Difference: DigitisationDelay (1 vs. 2)

Revision 22008-02-12 - OlafBehrendt

Line: 1 to 1
 
META TOPICPARENT name="SliceTest"

Slice Test - Digitisation delay scan

Line: 11 to 11
 
  1. In the panel opening up double click on "VELOA(C)_DAQ_TE" (lower left).
  2. If the top padlock (VELOA(C)_DAQ_TE) in the next panel is open, click on it and Take.
  3. Reset the TELL1 from the last tested slice by pressing on "READY" and selecting "RESET". This prevents the TELL1 of the last slice to continue sending data.
Changed:
<
<
  1. Exclude it from the FSM control by clicking on the tick mark next to it and confiming "Disable".
>
>
  1. Exclude it from the FSM control by clicking on the tick mark next to it and confirming "Disable".
 
  1. Include the TELL1 under test in the FSM control by clicking on the cross next to it and confirming "Enable".
  2. Go back to the main menu.
  3. Select the recipe "DELAYSCAN" in the pull down menu below "Activity:".
Changed:
<
<
  1. Configure the system by selcting "Configure" after clicking on "NOT_READY". This should bring the subsystems VELOA(C)_DAQ, VELOA(C)_Runinfo and VELOA(C)_TFC into the state "READY".
>
>
  1. Configure the system by selecting "Configure" after clicking on "NOT_READY". This should bring the subsystems VELOA(C)_DAQ, VELOA(C)_Runinfo and VELOA(C)_TFC into the state "READY".
 
  1. Select "Limited to" below "Max Nr. Triggers:" and enter 1000.
  2. Select "Yes, Steps" below "Automated Run with Steps:" and enter 16.
  3. Start the system by selecting "START_RUN" after clicking on "READY". This should bring the subsystems VELOA(C)_DAQ and VELOA(C)_Runinfo into the state "RUNNING" and VELOA(C)_TFC into the state "ACTIVE".
Line: 56 to 56
 
  1. Type "VELO_DAC_TIMED" in the text field below "Operate on Recipes", press enter and finally click on "save recipe".
  2. Close the window.
  3. Select the newly created recipe "VELO_DAC_TIMED" in the pull down menu next to "Configure FEM, DAC and Delay".
Changed:
<
<
  1. Type "VELO_SPCF_TIMED" in the text field below "Operate on Recipes", press enter and finally click on "Assemle SPCF Recipes".
>
>
  1. Type "VELO_SPCF_TIMED" in the text field below "Operate on Recipes", press enter and finally click on "Assemble SPCF Recipes".
 
  1. Close the window.
  2. Select the newly created recipe "VELO_SPCF_TIMED" in the pull down menu next to "Configure Specific Parameters".
Changed:
<
<
  1. Type "CABLETEST/Configure" in the text fild next to Miraculix, press enter and finally click on "Assemle Recipes".
>
>
  1. Type "CABLETEST/Configure" in the text field next to Miraculix, press enter and finally click on "Assemble Recipes".
 
  1. Repeat the last two steps for "PHYSICSTP/Configure" and "PHYSICSNTP/Configure".
Changed:
<
<
  1. You have suceeded in creating the recipes for the next steps.
>
>
  1. You have succeeded in creating the recipes for the next steps.
 

At the end of the day

Revision 12008-02-09 - OlafBehrendt

Line: 1 to 1
Added:
>
>
META TOPICPARENT name="SliceTest"

Slice Test - Digitisation delay scan

Data taking

  1. Follow the instructions of the item "General start" of the instructions PVSS operation of the system if not already done today.
  2. Follow the instructions of the item "Configure Control Board and hybrid " of the instructions PVSS operation of the system using the recipe "DELAYSCAN".
  3. Go back to the main menu.
  4. Double click on "VELOA(C)_DAQ".
  5. In the panel opening up double click on "VELOA(C)_DAQ_TE" (lower left).
  6. If the top padlock (VELOA(C)_DAQ_TE) in the next panel is open, click on it and Take.
  7. Reset the TELL1 from the last tested slice by pressing on "READY" and selecting "RESET". This prevents the TELL1 of the last slice to continue sending data.
  8. Exclude it from the FSM control by clicking on the tick mark next to it and confiming "Disable".
  9. Include the TELL1 under test in the FSM control by clicking on the cross next to it and confirming "Enable".
  10. Go back to the main menu.
  11. Select the recipe "DELAYSCAN" in the pull down menu below "Activity:".
  12. Configure the system by selcting "Configure" after clicking on "NOT_READY". This should bring the subsystems VELOA(C)_DAQ, VELOA(C)_Runinfo and VELOA(C)_TFC into the state "READY".
  13. Select "Limited to" below "Max Nr. Triggers:" and enter 1000.
  14. Select "Yes, Steps" below "Automated Run with Steps:" and enter 16.
  15. Start the system by selecting "START_RUN" after clicking on "READY". This should bring the subsystems VELOA(C)_DAQ and VELOA(C)_Runinfo into the state "RUNNING" and VELOA(C)_TFC into the state "ACTIVE".
  16. This is the latest moment to start the eventbuilder!
  17. Start the run by selecting "GO".
  18. As the steps are worked through the system undergoes a couple of state transitions.
  19. Wait until the run is automatically stopped. The subsystems VELOA(C)_DAQ, VELOA(C)_Runinfo and VELOA(C)_TFC should be in the state "READY".
  20. Stop the eventbuilder!
  21. Reset the system by selecting "RESET" after clicking on "READY". This should bring the subsystems VELOA(C)_DAQ, VELOA(C)_Runinfo and VELOA(C)_TFC into the state "NOT_READY".

Data analysis

  1. see instructions Data Analysis

Application of the new settings (a bit tedious)

This can unfortunately not be done from our main PVSS project since the panels are not properly exported. It is a good idea to follow the following steps on a different PC not to confuse the PVSS panels of the two projects.

Start of the PVSS project (only at the start of the day)

  1. Log on to the control PC vedaqa02 with the help of PUTTY.
  2. Type "startConsole".
  3. Select the project "VEDAQA(C)TE".
  4. Start the project by clicking on the green traffic light on top.
  5. Select the tab FSM of the window "Device Editor & Navigator" that pops up.
  6. Click on "Start/Restart all"
  7. Click on the + next to "VEDAQA(C)TE".
  8. Right Click on "VELOA(C)_DAQ_TE" and select view.

Change the settings

  1. Double click on the TELL1 under test.
  2. In the window popping up select the tab "Recipes"
  3. Click on "Configure Specific Parameters" (middle left).
  4. In the window popping up click on "Configure FEM, DAC and Delay" (middle left).
  5. in the pull-down menu below "Operate on recipes" select "VELO_DAC" and click on "load recipe".
  6. Change the settings of the phase and cycle delay according to the output of the analysis software.
  7. Type "VELO_DAC_TIMED" in the text field below "Operate on Recipes", press enter and finally click on "save recipe".
  8. Close the window.
  9. Select the newly created recipe "VELO_DAC_TIMED" in the pull down menu next to "Configure FEM, DAC and Delay".
  10. Type "VELO_SPCF_TIMED" in the text field below "Operate on Recipes", press enter and finally click on "Assemle SPCF Recipes".
  11. Close the window.
  12. Select the newly created recipe "VELO_SPCF_TIMED" in the pull down menu next to "Configure Specific Parameters".
  13. Type "CABLETEST/Configure" in the text fild next to Miraculix, press enter and finally click on "Assemle Recipes".
  14. Repeat the last two steps for "PHYSICSTP/Configure" and "PHYSICSNTP/Configure".
  15. You have suceeded in creating the recipes for the next steps.

At the end of the day

  1. Stop the PVSS project not to prevent others from using it next day by clicking on the red traffic light at the top right of the window "Console".

-- OlafBehrendt - 08 Feb 2008

 
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