* router_pit_ddl_v0-1.sof: first test version of the PIT DDL interface on the router hardware. Basic registers. Programming .sof file for router FPGA.

* router_pit_ddl_v0-1.pof: first test version of the PIT DDL interface on the router hardware. Basic registers. Programming .pof file for router EPROM.

* router_pit_ddl_v0-2.sof: second test version of the PIT DDL interface on the router hardware. Special purpose registers implemented, exactly as in the PIT BRAIN card firmware version using the FPGA internal memory. Programming .sof file for router FPGA.

* router_pit_ddl_v0-2.pof: second test version of the PIT DDL interface on the router hardware. Special purpose registers implemented, exactly as in the PIT BRAIN card firmware version using the FPGA internal memory. Programming .pof file for router EPROM.

Topic attachments
I Attachment History Action Size Date Who Comment
Unknown file formatpof router_pit_ddl_v0-1.pof r1 manage 2048.1 K 2007-05-25 - 17:41 UnknownUser first test version of the PIT DDL interface on the router hardware. EPROM programming file
Unknown file formatsof router_pit_ddl_v0-1.sof r1 manage 1249.0 K 2007-05-25 - 17:39 UnknownUser first test version of the PIT DDL interface on the router hardware, FPGA programming file
Unknown file formatpof router_pit_ddl_v0-2.pof r1 manage 2048.1 K 2007-05-25 - 18:01 UnknownUser Second test version of the PIT DDL interface on the router hardware. EPROM programming file
Unknown file formatsof router_pit_ddl_v0-2.sof r1 manage 1249.0 K 2007-05-25 - 18:02 UnknownUser Second test version of the PIT DDL interface on the router hardware. FPGA programming file
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Topic revision: r1 - 2007-05-25 - GianlucaAglieriRinella
 
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