Fig. 1: Here goes the plot title/short content description and the upload date And here goes the detailed and background information | ![]() |
Fig. 1: Spatial resolution of a single Micromegas chamber vs incident angle Spatial resolution using the charge centroid method (blue triangles), the μTPC method (full red circles) and the combination of the two (black open circles)” as a function of the particle incident angle. The resolution is obtained from the residual distribution of the hit position difference between two Micromegas chambers separated by a small distance. | ![]() |
Fig. 2: Spatial resolution of precision coordinate of the MMSW The MMSW is the Micromegas Quadruplet Prototype. | ![]() |
Fig. 2: Spatial resolution of second coordinate of the MMSW The MMSW is the Micromegas Quadruplet Prototype. | ![]() |
Fig. 1: Here goes the plot title/short content description and the upload date And here goes the detailed and background information | ![]() |
Fig. 2: Inclusive sTGC residual The reference track is built from all four hits in the sTGC quadruplet. | ![]() |
Fig. 2: Exclusive sTGC residual The reference track is built from three hits in the sTGC quadruplet, excluding the first hit for which the residual is computed. | ![]() |
Fig. 2: sTGC residual The reference track is built from hits in three pixel layers before and after the sTGC quadruplet. | ![]() |
Fig. 1: Here goes the plot title/short content description and the upload date And here goes the detailed and background information | ![]() |
Fig. 1: Performance of sTGC serializer: "Eye" diagram The sTGC trigger data serializer (TDS) ASIC chip is responsible for the preparation of trigger data for both pads and strips with additional task of serializing data for transmission to the circuits on the rim of the NSW detector. The serializer is realized in IBM 130 nm CMOS technology. It is adapted from the CERN GBT serializer, with changed architecture from loading 120 bits at 40 MHz to loading 30 bits in parallel at 160 MHz. The serial output is at 4.8 Gbps. The eye diagram is evaluated in a 12.5 GHz bandwidth, 50 GS/s oscilloscope with a PRBS-31 pattern. The height of the eye is measured to be about 540 mV, and the width is about 180.3 ps. Jitter analysis shows that the total jitter at a bit-error-ratio (BER) of 1E-12 is 49.7 ps. A BER test with embedded PRBS checker inside a Xilinx 7 FPGA was also performed. An error free running of three days has been achieved, which corresponds to a BER less than 1 E-15. | ![]() |
I | Attachment | History | Action | Size | Date | Who | Comment |
---|---|---|---|---|---|---|---|
![]() |
mm_single_plane_spatial_resolution.png | r1 | manage | 19.1 K | 2014-11-18 - 01:37 | OliverStelzerChilton | MM single plane spatial resolution vs incident angle |
![]() |
mmsw_precision_coordinate.png | r1 | manage | 36.3 K | 2014-11-18 - 01:39 | OliverStelzerChilton | MMSW precision coordinate resolution |
![]() |
mmsw_second_coordinate.png | r1 | manage | 41.1 K | 2014-11-18 - 01:39 | OliverStelzerChilton | MMSW second coordinate resolution |
![]() |
sTGC_residual_pixel.png | r1 | manage | 45.5 K | 2014-11-19 - 19:57 | OliverStelzerChilton | sTGC residual with respect to a pixel track |
![]() |
sTGC_serializer_performance.png | r1 | manage | 271.4 K | 2014-12-01 - 19:50 | OliverStelzerChilton | sTGC serializer performance |
![]() |
sTGC_standalone_residuals_exc.png | r1 | manage | 131.6 K | 2014-11-19 - 01:26 | OliverStelzerChilton | sTGC standalone exclusive resolution |
![]() |
sTGC_standalone_residuals_inc.png | r1 | manage | 116.8 K | 2014-11-19 - 01:26 | OliverStelzerChilton | sTGC standalone inclusive resolution |
![]() |
![]() |
![]() |
![]() |
|
![]() |
|
![]() |