Parts on Detail

Diamond Detector Secondary Shower Acquisiton System

ICECAL_V3 Mezzanine > ADC41240 and THS4521 Linearity and Noise

1. Noise Distribution

The differential inputs of the ADC Drivers (THS4521) were connected directly to ground in order to identify the inherent noise coming from this specific part of the circuit. A temporal windows of 250us was recorded at 40MSPS for such study (meaning a total of 10000 points per graph). A histogram of the signal was performed to valuate the noise distribution. In the bottom plot it is shown that the sigma value of the noise of the ADC and drivers remains bellow 1 count for the four channels.


2. Linearity Check with Keithley 2410

A linear voltage sweep was performed with a Keithley 2410 controlled by GPIB between -1.5V to +1.5V in steps of 0.01V, being in total 300 measurement points per channel. Every measurement was done statically at a fixed voltage value, collecting temporal windows of 250us, the mean value of the ADC and it's standard deviation was recorded. The linearity plot is build by plotting the mean ADC value of each measurement versus the Keithley2410 voltage value (top plots). A linear fit is done on the data to study the system non linearity, which is extracted as the difference of the measurement data with respect to the linear fit, on the bottom plots it is shown the differential non linearity and the standard deviation respect to the ADC mean value. The linearity measurements were done twice, first injecting the K2410 signal in the non inverting input of the amplifier, and later on the inverting input with the aim to study possible assimetries on the linearity plots. The ADC drivers were not loaded (high impedance input), the output of the K2410 was connected to a low pass filter build by a 50 ohms series resistor and a 1uF capactitor (Fc = 3KHz). It was observed that the Noise contribution of the K2410 into the system had certain dependence on the series resistor placed on it's output. With such filter the noise distribution standard deviation reached ~2 ADC counts (See Bottom plot).



In both configurations (inverting and non inverting) the plots are showing an asimetry on the ADC encoding, the adc saturates for V < 1.2V and V> 1V, such asymetry is due to the loading resistor of the ADC Drivers included on the pin where no signal was injected. These resistors must match the output impedance of the K2410 and filter, only a 50 ohms resistor was included on this pin of the ADC drivers (once the ICECAL is connected this asimetry must disapear, since it works with a differential configuration). With regard to the system non linearity it always remains <-+ 10 ADC counts, on such configuration CH0 and CH3 are showing a similar behavior, as well as CH1 and CH2, wich could be due the board a layout simetry.

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PNGpng ADC_DRIVERS_INPUT_GND.png r1 manage 47.5 K 2016-03-30 - 15:34 UnknownUser  
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PNGpng ADC_DRIVERS_LINEARITY_No_Inv.png r1 manage 53.2 K 2016-03-30 - 15:30 UnknownUser  
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