Parts on Detail

Diamond Detector Secondary Shower Acquisiton System

0. Detector system

• Alternative detector system

1.System Architecture

The system architecture proposed is shown in figure 1. This is a front-end/back-end based architecture. The front-end system will be placed in the tunnel at ~10m from the diamond detector (or shielded locations) to reduce the cable impact. The goal is to design a radiation hard front-end to perform charge integration at 40MHz, synchronous with the beam and with a very high dynamic range, and sent this data through single mode optical fibre (SMF) using CERN’s GBT optical link at 4.8Gbps to the back-end. The front-end synchronization, data transmission and control will be performed through the optical link. For the back-end system the VME FMC Carrier board (VFC) will be used. The back-end will manage the link synchronization with the bunch crossing frequency and will receive the data for processing and storage. The VFC SFP+ optical transceivers are planned to be used for the optical link (one VFC board can drive up to 4 front-end boards).

Figure 1. Proposed System Architecture

2.Prototype Boards

The readout system needs to be evaluated with two different integrator ASICs, for this, a modular design is used. Each readout ASIC candidate is hosted in a custom Radiation-Tolerant mezzanine with a SAMTEC connector that fits on a motherboard, the Igloo2 UMd board (designed by CMS) that drives the optical link.

ASICS:

• QIE10: The QIE10 is an ASIC from the family of devices designed at Fermilab for use in measuring signals from photo-detectors. The QIE (Charge Integrator and Encoder) integrates input charge pulses (or current) in 25 nS periods, and digitizes at 40 MHz using 4 phases of operation in pipelined fashion. It has 17 bits of dynamic range, which are encoded into 6 bits of mantissa and 2 range bits, or 256 codes. This scheme provides a floating point digitization of the input charge at 40 MHz, and is dead-timeless. The device has approximately logarithmic response, with approximately constant resolution over the dynamic range. The device also has a 6 bit time-to-digital converter (TDC), with ∼ 0.5 ns resolution for each time slice. The QIE10 is fabricated in a 350 nm SiGe process, providing intrinsic hardness against ionizing radiation.
• • T.Roy et al. QIE: performance studies of the next generation charge integrator. 2014 JINST 10 C02009
  • A.Baumbaugh et al. QIE10: a new front-end custom integrated circuit for high-rate experiments. 2014 JINST 9 C01062 (Presentation here)

• ICECAL:This is a radiation-hard integrator ASIC, working at 40MHz, developed by the University of Barcelona for the LHCb experiment. It features 4 channels, with a charge sensitivity of 4fC and saturation around 16pC, featuring therefore a dynamic range of 4e3. The ASIC provides an analog voltage every 25 ns proportional to the integrated current seen at the input. A linear 4 channel 12 bits ADC is responsible for the digitalization of the ICECAL outputs.
• • E.Picatoste et al. Low noise 4-channel front end ASIC with on-chip DLL for the upgrade of the LHCb Calorimeter. 2015 JINST 10 C04017 (Presentation here)
  • E.Picatoste et al. Low noise front end ICECAL ASIC for the upgrade of the LHCb calorimeter. 2012 JINST 7 C01080 (Presentation here)

Boards:

• Igloo2 UMd Board:Acts as the front-end motherboard, equipped with a flash-based FPGA Igloo2, radiation tolerant components and a versatile link transceiver (VTRx) to drive the optical link with the GBT protocol.
• QIE10p5 Mezzanine:Equipped with two QIE10 ASICS, each, features one high dynamic range (1e5) channel. Radiation-tolerant linear regulators are used as POL regulators.
• ICECAL_V3 Mezzanine:Contains an ICECAL integrator ASIC, with 4 input channels. The ASIC output provides an analog voltage every 25ns, that is digitalized by an ADC. The mezzanine is powered with radiation hard FESTMP modules.

Figure x. Igloo2 UMd. Mezzanine Board	Figure x. Digital Front-End ICECAL_V3 version	Figure x. Digital Front-End QIE10 Version

2.1.QIE10 Front-End Prototype Measurements

A complete test set-up has been evaluated under laboratory conditions. The back-end system for prototype is based on an Igloo2 development kit.

The set-up was used for the QIE10 front-end evaluation. This charge integrator and digitalization ASIC reach a dynamic range of 1e5 (3.2fC-340pC) encoded with 8 bits by using a pseudo-logarithmic digitalization scheme. The charge encoding algorithm contains 16 sensitivity levels divided on 4 ranges.

The front-end was characterized in terms of linearity, difference with respect to the nominal response and sensitivities in each subrange. Linear sweeps with a Keithley current source were done. Each point on the following charts corresponds to the average value detected during 25us with constant current.

Figure x. QIE10 Logarithmic measured response VS nominal values	Figure x. The QIE10 16 sensitivity levels

2.2. ICECAL_V3 Front-End Prototype Measurements

ICECAL is an integrator ASIC developed by the University of Barcelona for the LHCb experiment. Each of its 4 channels can reach 1e3 (12 bits) dynamic range. A custom mezzanine was developed on this project to host the ASIC in a front-end system for tunnel digitalization. The ASIC functionality was tested, once mounted on the board, to check its correct operation. The set-up shown on the following picture aims to reproduce the testing conditions used by the ASIC designers, but using our specific GBT optical link clock recovery scheme.

3.pCVD Diamond Detector as Beam Profile Monitor

3.1 Beam Tests with Set-up #1

A pCVD Diamond detector and transimpedance amplifier were placed on the SPS complex, near an operational linear Beam Wire Scanner, in order to asses the detector performance for secondary particles detection and beam profile monitor. A nearby operational acquisition system, consisting on a scintillator attached to a photo-multiplier tube (PMT) and a pre-amplifier, was used for comparison. The measurements were collected on the surface with a LeCroy Scope at 2.5GSPS. Around 80m of CK50 cables were used for signal transmission.

Figure x. Test set-up on the SPS accelerator Figure x. Simplified set-up for evaluating a pCVD diamond detector as beam profile monitor

Figure x. Signal amplitude of secondary shower intensities as a function of time and position. Top: pCVD Diamond detector measurements versus time. Middle: pCVD diamond detector integrals versus position. Bottom: Scintillator/PMT detector measurements versus position.

A couple of interesting effects can be observed comparing the previous middle and bottom plots of the profiles:

• Spread of detector signals: The measured signals on both detectors (pCVD and scintillator/PMT) are parameterized with a Gaussian distribution. It can be observed that the residuals variation is larger for the pCVD compared to the scintillator/PMT assembly. The highervariation shown by the diamond detector signal could be a statistical effect related to the random distribution of the secondary particle cone produced by beam-wire interaction, and the small size of the detector (1cm²). With the scintillator covering a larger area, the effect of particle number fluctuation in the final signal is much lower compared to the pCVD detector.
• Profile width determination:The sigma values of the Gaussian parametrization for the pCVD detector is a 27% smaller than for scintillator/PMT setup. The reason of such beam profile difference remains unknown, and further studies are needed to understand this effect.

Although the sources of such differences remain unclear, they do not seem to be related to an effect of the electronics or the processing algorithm. To study such effects, a different set-up is scheduled to be installed at the same location with two diamond detectors placed above and below the beam pipe.

3.2 Beam Tests with Set-Up #2

3.2.1 Beam Intensity Variation at Constant Energy 450GeV

Figure x. Back-End system for Beam intensity variation at constant energy 450GeV.

Figure x. Beam profiles graphical reports with a SPS Pilot Beam 5e9 PpB at 450GeV.

Figure x. Beam profiles graphical reports with a SPS Pilot Beam 1e11 PpB at 450GeV.

3.2.1 Beam Energy Variation at Constant Intensity 1e11 Particles per bunch

Figure x. Back-End system for Beam Energy variation at constant Intensity 1e11 ppb.

Figure x. Beam profiles #45 and #80 SPS LHC_INDIV Beam 1e11 PpB at 26GeV.

Figure x. Beam profiles #45 and #80 SPS LHC_INDIV Beam 1e11 PpB at 450GeV.

6.Information tracking for upgraded system version (GEFE + VFC)

OFFICIAL DOCUMENTS
Date	Information	Comments
2015_02_16	VFC a VME FMC Carrier Board HD (EDA-03133-V1-0)	VFC-HD --> EDMS page for schematics
2015_07_30	Open Hardware Repository VME FMC Carrier HPC-DDR3 (VFC-HD)	VFC-HD --> OHR Web page for project
2015_04_14	GEFE GBT-Based Expandable Front-End (EDA-03168-V1-0)	GEFE --> EDMS page for schematics
2015_09_11	Open Hardware Repository GBT-Based Expandabla Front-End (GEFE)	GEFE -->OHR Web page for project.
2016_01_01	The GBT Project Public Page	GBT Project ---> Documentation

RELATED PUBLICATIONS/TALKS
DATE	INFORMATION	COMMENTS
2015_11_01	A modular approach to Acquisition Systems for future CERN Beam instrumentation Developments.	GEFE + VFC --> ICALEPS15 Contribution
2015_12_04	BI/TB on LHC Fast BCT detectors, Digital Electronics, GEFE and VFC Production	GEFE + VFC --> Official presentation of boards status
2015_10_02	The GBT-Based Expandable Front-End (GEFE)	GEFE --> TWEPP2015 Contribution
2015_09_09	BI-TB on LN2-> PSB BPM, RadHard electronics and VFC Upate	GEFE + VFC --> Official presentation of boards status

7. Other Interesting projects.

Date	Publications
2016_09	Upgrade of the LHC Bunch By Bunch Intensity Measurement Acquisition System. ( Poster here). D.Belohrad, D.Esperante, J.Kral, S.B Pedersen. IBIC2016 Barcelona Spain