Details
Date |
17/08/2020 |
Location |
University of Bristol lab |
People |
Stoyan Trilov |
Test description
Test firmware+software for DUNE DAQ v2.8.0 release. Tags used for the software and firmware are listed below.
timing - relval/v5.5.0/b0 / relval/v5.5.0/b1 (specified when used)
timinglibs - relval/v1.2.0/b0
timing-board-firmware - relval/v6.0.0/b2
The hardware and the corresponding fibre connections used for the tests are listed below.
fanout <-> FMC (0x49162b675ea)
TLU <-> FMC (0xd880395da48e)
FMC - standalone
FIB+AFC - standalone
timinglibs
Master commands @ 62.5 MHz
A timing app config was generated using the command
python -m timinglibs.timing_app_confgen -m PROD_FANOUT_0
The application was started with the below command.
daq_application --name timing_app -c stdin://timing_app.json
The following commands were successfully sent, and the expected effect on the timing firmware was seen.
init
conf
start
stop
master_io_reset
master_set_timestamp
master_print_status
partition_configure
partition_enable
partition_disable
partition_start
partition_stop
partition_enable_triggers
partition_disable_triggers
partition_print_status
The fanout unit was loaded with the bitfile:
https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/fanout_0_pc059_relval-v6-0-0-b2_sha-3304ef99_runner-6bb6b053-project-19909-concurrent-2_210812_1432.tgz
Master+Endpoint commands @ 50 MHz
A timing app config was generated using the command
python -m timinglibs.timing_app_confgen -m PROD_FANOUT_0 -e EPT_1
EPT_1 corresponds to an FMC (UID: 0x49162b675ea) with the 50 MHz endpoint design loaded,
https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/endpoint_pc053d_fmc_50_mhz_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-10_210812_1423.tgz
. EPT_1 receives timing stream data from the fanout with firmware:
https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/fanout_0_pc059_50_mhz_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-7_210812_1433.tgz
.
The application was started with the below command.
daq_application --name timing_app -c stdin://timing_app.json
The following commands were successfully sent, and the expected effect on the timing firmware was seen. E.g., partition run start/stop, PLL lock, endpoint lock.
init
conf
start
stop
master_io_reset
master_set_timestamp
master_print_status
partition_configure
partition_enable
partition_disable
partition_start
partition_stop
partition_enable_triggers
partition_disable_triggers
partition_print_status
endpoint_io_reset
endpoint_enable
endpoint_disable
endpoint_reset
endpoint_print_status
Master+HSI commands @ 62.5 MHz
A timing app config was generated using the command
python -m timinglibs.timing_app_confgen -m BOREAS_FMC -h BOREAS_FMC --hsi-re-mask 4096 --hsi-source 1
BOREAS_FMC corresponds to an FMC (UID: 0x49162b675ea) with the 62.5 MHz boreas (master_HSI) design loaded,
https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/boreas_pc053d_fmc_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-15_210812_1433.tgz
.
The application was started with the below command.
daq_application --name timing_app -c stdin://timing_app.json
The following commands were successfully sent, and the expected effect on the timing firmware was seen. E.g., partition run start/stop, HSI configured/started/stopped.
init
conf
start
stop
master_io_reset
master_set_timestamp
master_print_status
partition_configure
partition_enable
partition_disable
partition_start
partition_stop
partition_enable_triggers
partition_disable_triggers
partition_print_status
hsi_io_reset
hsi_endpoint_enable
hsi_endpoint_disable
hsi_endpoint_reset
hsi_reset
hsi_configure
hsi_start
hsi_stop
hsi_print_status
timing
Master+Endpoint commands @ 50 MHz
Fanout <-> FMC
FANOUT - PROD_FANOUT_0 - https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/fanout_0_pc059_50_mhz_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-7_210812_1433.tgz
FMC - EPT_1 - https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/endpoint_pc053d_fmc_50_mhz_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-10_210812_1423.tgz
The following master+endpoint setup commands executed successfully with the expected output.
pdtbutler io PROD_FANOUT_0 reset --fanout-mode 1
pdtbutler mst PROD_FANOUT_0 synctime
pdtbutler mst PROD_FANOUT_0 part 0 configure
pdtbutler io EPT_1 reset
pdtbutler ept EPT_1 0 enable -a 2
pdtbutler mst PROD_FANOUT_0 align apply-delay 2 0 0 --force
The delay measurement procedure worked successfully.
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler mst PROD_FANOUT_0 align measure-delay 2 --mux 0
Created device PROD_FANOUT_0
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | pc059 |
| Board revision | kPC059Rev1 |
| Board UID | 0xd88039d9248e |
| Carrier type | enclustra-a35 |
| Design type | fanout |
| Firmware frequency [MHz] | 50.000000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
2021-Aug-17 12:06:40,126 LOG [dunedaq::timing::GlobalNode::enable_upstream_endpoint(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/GlobalNode.cpp:96] Upstream endpoint reset, waiting for lock
Endpoint (adr: 2, mux: 0) RTT: 26
The following master+endpoint status commands executed successfully with the expected output.
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler mst PROD_FANOUT_0 part 0 status
Created device PROD_FANOUT_0
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | pc059 |
| Board revision | kPC059Rev1 |
| Board UID | 0xd88039d9248e |
| Carrier type | enclustra-a35 |
| Design type | fanout |
| Firmware frequency [MHz] | 50.000000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
-- Master state---
Timestamp: 0x121675fa0925f36 -> Tue, 17 Aug 2021 12:09:33 +0000
--------------Cmd gen counters--------------
+------+-----------------+-----------------+
| | Accept counters | Reject counters |
+------+-----------------+-----------------+
| Chan | cnts | hex | cnts | hex |
+------+--------+--------+--------+--------+
| 0x0 | 0 | 0 | 0 | 0 |
| 0x1 | 0 | 0 | 0 | 0 |
| 0x2 | 0 | 0 | 0 | 0 |
| 0x3 | 0 | 0 | 0 | 0 |
| 0x4 | 0 | 0 | 0 | 0 |
+------+--------+--------+--------+--------+
=> Partition 0
---------Controls--------
+---------------+-------+
| Register | Value |
+---------------+-------+
| buf_en | 0 |
| frag_mask | 0 |
| part_en | 0x1 |
| rate_ctrl_en | 0x1 |
| run_req | 0 |
| spill_gate_en | 0x1 |
| trig_ctr_rst | 0 |
| trig_en | 0 |
| trig_mask | 0xf1 |
+---------------+-------+
--------State-------
+----------+-------+
| Register | Value |
+----------+-------+
| buf_err | 0 |
| buf_warn | 0 |
| in_run | 0 |
| in_spill | 0 |
| part_up | 0x1 |
| run_int | 0 |
+----------+-------+
Event Counter: 0
Buffer status: OK
Buffer occupancy: 0
+-------------+-----------------+-----------------+
| | Accept counters | Reject counters |
+-------------+-----------------+-----------------+
| Cmd | cnts | hex | cnts | hex |
+-------------+--------+--------+--------+--------+
| TimeSync | 19 | 0x13 | 0 | 0 |
| Echo | 1 | 0x1 | 0 | 0 |
| SpillStart | 0 | 0 | 0 | 0 |
| SpillStop | 0 | 0 | 0 | 0 |
| RunStart | 0 | 0 | 0 | 0 |
| RunStop | 0 | 0 | 0 | 0 |
| WibCalib | 0 | 0 | 0 | 0 |
| SSPCalib | 0 | 0 | 0 | 0 |
| FakeTrig0 | 0 | 0 | 0 | 0 |
| FakeTrig1 | 0 | 0 | 0 | 0 |
| FakeTrig2 | 0 | 0 | 0 | 0 |
| FakeTrig3 | 0 | 0 | 0 | 0 |
| BeamTrig | 0 | 0 | 0 | 0 |
| NoBeamTrig | 0 | 0 | 0 | 0 |
| ExtFakeTrig | 0 | 0 | 0 | 0 |
+-------------+--------+--------+--------+--------+
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler ept EPT_1 0 status
Created endpoint device EPT_1
----------------Hardware info---------------
+--------------------------+---------------+
| Board type | fmc |
| Board revision | kFMCRev3 |
| Board UID | 0x49162b675ea |
| Carrier type | enclustra-a35 |
| Design type | endpoint |
| Firmware frequency [MHz] | 50.000000 |
+--------------------------+---------------+
+---------+
| 0 |
| 0x50400 |
+---------+
+------------------+---------------------------------+
| Endpoint | 0 |
+------------------+---------------------------------+
| State | Ready (0x8) |
| Partition | 0 |
| Address | 2 |
| Timestamp | Tue, 17 Aug 2021 12:09:47 +0000 |
| Timestamp (hex) | 0x121675fcac54a41 |
| EventCounter | 0 |
| Buffer status | OK |
| Buffer occupancy | 0 |
+------------------+---------------------------------+
--- Endpoint state ---
+------------+----------+
| Endpoint | 0 |
+------------+----------+
| buf_err | 0x0 |
| buf_warn | 0x0 |
| cdelay | 0x0 |
| ep_rdy | 0x1 |
| ep_rsto | 0x0 |
| ep_stat | 0x8 |
| fdelay | 0x0 |
| in_run | 0x0 |
| in_spill | 0x0 |
| sfp_tx_dis | 0x1 |
+------------+----------+
--- Command counters ---
+--------------+----------+
| Endpoint | 0 |
+--------------+----------+
| TimeSync | 32 |
| Echo | 1 |
| SpillStart | |
| SpillStop | |
| RunStart | |
| RunStop | |
| WibCalib | |
| SSPCalib | |
| FakeTrig0 | |
| FakeTrig1 | |
| FakeTrig2 | |
| FakeTrig3 | |
| BeamTrig | |
| NoBeamTrig | |
| ExtFakeTrig | |
| None | |
+--------------+----------+
The following master trigger commands executed successfully with the expected output, e.g. triggers generated at specified rate.
pdtbutler mst PROD_FANOUT_0 faketrig-conf 0 0.5
pdtbutler mst PROD_FANOUT_0 faketrig-conf 0 1
pdtbutler mst PROD_FANOUT_0 faketrig-conf 0 2
pdtbutler mst PROD_FANOUT_0 faketrig-clear 0
TLU <-> FMC
TLU - PROD_MASTER - https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/overlord_tlu_50_mhz_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-4_210812_1431.tgz
FMC - EPT_0 - https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/endpoint_pc053d_fmc_50_mhz_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-10_210812_1423.tgz
The following master+endpoint setup commands executed successfully with the expected output.
pdtbutler io PROD_MASTER reset
pdtbutler mst PROD_MASTER synctime
pdtbutler mst PROD_MASTER part 0 configure
pdtbutler io EPT_0 reset
pdtbutler ept EPT_0 0 enable -a 2
pdtbutler mst PROD_MASTER align apply-delay 2 0 0 --force
The delay measurement procedure worked successfully.
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler mst PROD_MASTER align measure-delay 2
Created device PROD_MASTER
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | tlu |
| Board revision | kTLURev1 |
| Board UID | 0x5410ecbba408 |
| Carrier type | enclustra-a35 |
| Design type | overlord |
| Firmware frequency [MHz] | 50.000000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
2021-Aug-17 13:28:35,035 LOG [dunedaq::timing::GlobalNode::enable_upstream_endpoint(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/GlobalNode.cpp:96] Upstream endpoint reset, waiting for lock
Endpoint (adr: 2) RTT: 65
The following master+endpoint status commands executed successfully with the expected output.
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler mst PROD_MASTER part 0 status
Created device PROD_MASTER
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | tlu |
| Board revision | kTLURev1 |
| Board UID | 0x5410ecbba408 |
| Carrier type | enclustra-a35 |
| Design type | overlord |
| Firmware frequency [MHz] | 50.000000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
-- Master state---
Timestamp: 0x12167ae2a4a9865 -> Tue, 17 Aug 2021 14:02:00 +0000
--------------Cmd gen counters--------------
+------+-----------------+-----------------+
| | Accept counters | Reject counters |
+------+-----------------+-----------------+
| Chan | cnts | hex | cnts | hex |
+------+--------+--------+--------+--------+
| 0x0 | 0 | 0 | 0 | 0 |
| 0x1 | 0 | 0 | 0 | 0 |
| 0x2 | 0 | 0 | 0 | 0 |
| 0x3 | 0 | 0 | 0 | 0 |
| 0x4 | 0 | 0 | 0 | 0 |
+------+--------+--------+--------+--------+
=> Partition 0
---------Controls--------
+---------------+-------+
| Register | Value |
+---------------+-------+
| buf_en | 0 |
| frag_mask | 0 |
| part_en | 0x1 |
| rate_ctrl_en | 0x1 |
| run_req | 0 |
| spill_gate_en | 0x1 |
| trig_ctr_rst | 0 |
| trig_en | 0 |
| trig_mask | 0xf1 |
+---------------+-------+
--------State-------
+----------+-------+
| Register | Value |
+----------+-------+
| buf_err | 0 |
| buf_warn | 0 |
| in_run | 0 |
| in_spill | 0 |
| part_up | 0x1 |
| run_int | 0 |
+----------+-------+
Event Counter: 0
Buffer status: OK
Buffer occupancy: 0
+-------------+-----------------+-----------------+
| | Accept counters | Reject counters |
+-------------+-----------------+-----------------+
| Cmd | cnts | hex | cnts | hex |
+-------------+--------+--------+--------+--------+
| TimeSync | 11 | 0xb | 0 | 0 |
| Echo | 1 | 0x1 | 0 | 0 |
| SpillStart | 0 | 0 | 0 | 0 |
| SpillStop | 0 | 0 | 0 | 0 |
| RunStart | 0 | 0 | 0 | 0 |
| RunStop | 0 | 0 | 0 | 0 |
| WibCalib | 0 | 0 | 0 | 0 |
| SSPCalib | 0 | 0 | 0 | 0 |
| FakeTrig0 | 0 | 0 | 0 | 0 |
| FakeTrig1 | 0 | 0 | 0 | 0 |
| FakeTrig2 | 0 | 0 | 0 | 0 |
| FakeTrig3 | 0 | 0 | 0 | 0 |
| BeamTrig | 0 | 0 | 0 | 0 |
| NoBeamTrig | 0 | 0 | 0 | 0 |
| ExtFakeTrig | 0 | 0 | 0 | 0 |
+-------------+--------+--------+--------+--------+
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler ept EPT_0 0 status
Created endpoint device EPT_0
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fmc |
| Board revision | kFMCRev4 |
| Board UID | 0xd880395da48e |
| Carrier type | enclustra-a35 |
| Design type | endpoint |
| Firmware frequency [MHz] | 50.000000 |
+--------------------------+----------------+
+---------+
| 0 |
| 0x50400 |
+---------+
+------------------+---------------------------------+
| Endpoint | 0 |
+------------------+---------------------------------+
| State | Ready (0x8) |
| Partition | 0 |
| Address | 2 |
| Timestamp | Tue, 17 Aug 2021 14:02:00 +0000 |
| Timestamp (hex) | 0x12167ae2abbca1b |
| EventCounter | 0 |
| Buffer status | OK |
| Buffer occupancy | 0 |
+------------------+---------------------------------+
--- Endpoint state ---
+------------+----------+
| Endpoint | 0 |
+------------+----------+
| buf_err | 0x0 |
| buf_warn | 0x0 |
| cdelay | 0x0 |
| ep_rdy | 0x1 |
| ep_rsto | 0x0 |
| ep_stat | 0x8 |
| fdelay | 0x0 |
| in_run | 0x0 |
| in_spill | 0x0 |
| sfp_tx_dis | 0x1 |
+------------+----------+
--- Command counters ---
+--------------+----------+
| Endpoint | 0 |
+--------------+----------+
| TimeSync | 3 |
| Echo | 1 |
| SpillStart | |
| SpillStop | |
| RunStart | |
| RunStop | |
| WibCalib | |
| SSPCalib | |
| FakeTrig0 | |
| FakeTrig1 | |
| FakeTrig2 | |
| FakeTrig3 | |
| BeamTrig | |
| NoBeamTrig | |
| ExtFakeTrig | |
| None | |
+--------------+----------+
The following master trigger commands executed successfully with the expected output, e.g. triggers generated at specified rate.
pdtbutler mst PROD_MASTER faketrig-conf 0 0.5
pdtbutler mst PROD_MASTER faketrig-conf 0 1
pdtbutler mst PROD_MASTER faketrig-conf 0 2
pdtbutler mst PROD_MASTER faketrig-clear 0
Master commands @ 62.5 MHz
FIB+AFC
AFC clock crossbar configuration:
(dbt-pyvenv) [st15719@bayban dev3]$ afcbutler --amc-slot 3 crossbar configure
Crossbar config applied
(dbt-pyvenv) [st15719@bayban dev3]$ afcbutler --amc-slot 3 crossbar read-config
Active map: 0
+--------+-------+-------+----------+
| Output | Map 0 | Map 1 | Tx state |
+--------+-------+-------+----------+
| 0 | 7 | 7 | Disabled |
| 1 | 7 | 7 | Disabled |
| 2 | 7 | 7 | Disabled |
| 3 | 7 | 7 | Disabled |
| 4 | 7 | 7 | Disabled |
| 5 | 13 | 7 | Enabled |
| 6 | 7 | 7 | Disabled |
| 7 | 7 | 7 | Disabled |
| 8 | 7 | 7 | Disabled |
| 9 | 7 | 7 | Disabled |
| 10 | 7 | 7 | Disabled |
| 11 | 7 | 7 | Disabled |
| 12 | 7 | 7 | Disabled |
| 13 | 7 | 7 | Disabled |
| 14 | 7 | 7 | Disabled |
| 15 | 7 | 7 | Disabled |
+--------+-------+-------+----------+
Firmware:
https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/fanout_fib_afc_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-11_210812_1427.tgz
With above firmware, I2C does not appear to work, see error below.
(dbt-pyvenv) [st15719@bayban dev3]$ pdtbutler io FAN_FIB_AFC reset
^[[ACreated device FAN_FIB_AFC
Design 'fanout' on board 'fib' on carrier 'afc' with frequency 62.5 MHz
Resetting FAN_FIB_AFC
Fanout mode enabled
ERROR ('RuntimeError' exception): ' I2C bus: i2c arbitration lost. Is another application running? I2CException on bus: i2c'
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/install/timing/lib64/python/timing/cli/io.py", line 172, in reset
lIO.reset(fanout, lPLLConfigFilePath)
Exception in user code:
------------------------------------------------------------
Traceback (most recent call last):
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/install/timing/bin/pdtbutler", line 104, in <module>
cli(obj=PDTContext())
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/core.py", line 829, in __call__
return self.main(*args, **kwargs)
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/core.py", line 782, in main
rv = self.invoke(ctx)
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/core.py", line 1259, in invoke
return _process_result(sub_ctx.command.invoke(sub_ctx))
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/core.py", line 1259, in invoke
return _process_result(sub_ctx.command.invoke(sub_ctx))
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/core.py", line 1066, in invoke
return ctx.invoke(self.callback, **ctx.params)
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/core.py", line 610, in invoke
return callback(*args, **kwargs)
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/decorators.py", line 33, in new_func
return f(get_current_context().obj, *args, **kwargs)
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/dbt-pyvenv/lib/python3.8/site-packages/click/decorators.py", line 21, in new_func
return f(get_current_context(), *args, **kwargs)
File "/projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/install/timing/lib64/python/timing/cli/io.py", line 172, in reset
lIO.reset(fanout, lPLLConfigFilePath)
RuntimeError: I2C bus: i2c arbitration lost. Is another application running? I2CException on bus: i2c
Firmware from mr_30 does not appear to be have this issue. This version of firmware, i.e.
https://pdts-fw.web.cern.ch/pdts-fw/mr/30/latest/fanout_fib_afc_mr30_sha-a68123ce_runner-slu9p8x4-project-19909-concurrent-25_210622_1913.tgz
, is used for rest of FIB+AFC test.
A bug in the FIBIONode::get_status method was found, leading to a patch and timing tag relval/v5.5.0/b1. This tag is used for rest of FIB tests.
The following master setup commands executed successfully with the expected output.
(dbt-pyvenv) [st15719@bayban dev3]$ pdtbutler io FAN_FIB_AFC reset --fanout-mode 1
Created device FAN_FIB_AFC
Design 'fanout' on board 'fib' on carrier 'afc' with frequency 62.5 MHz
Resetting FAN_FIB_AFC
local master: standalone mode
2021-Aug-17 17:42:20,395 LOG [dunedaq::timing::FIBIONode::reset(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/FIBIONode.cpp:114] PLL configuration file : /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/install/timing/share/config/etc/clock/devel/Si5395-RevA-FIB_ouroboros-65_SA_31-Registers.txt
2021-Aug-17 17:42:23,297 LOG [dunedaq::timing::FIBIONode::reset(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/FIBIONode.cpp:127] Reset done
Active sfp mux 0x0
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fib |
| Board revision | kFIBRev1 |
| Board UID | 0x801f12f5e9ae |
| Carrier type | afc |
| Design type | fanout |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
------FIB IO state-----
+-------------+-------+
| Register | Value |
+-------------+-------+
| mmcm_ok | 0x1 |
| mmcm_sticky | 0 |
| pll_ok | 0 |
| pll_sticky | 0 |
+-------------+-------+
-------FIB SFPs state------
+-----------------+-------+
| Register | Value |
+-----------------+-------+
| SFP LOS flags | 0xff |
| SFP fault flags | 0xdf |
+-----------------+-------+
Active sfp mux 0
PLL Clock frequency measurement:
PLL freq: 312.502955195
CDR freq: 229.094367746
PLL configuration id : 65_SA_31
-------PLL information------
+-----------------+--------+
| Register | Value |
+-----------------+--------+
| Device grade | 0 |
| Device revision | 0 |
| Part number | 0x5395 |
+-----------------+--------+
----------PLL state----------
+-------------------+-------+
| Register | Value |
+-------------------+-------+
| CAL_PLL | 0 |
| HOLD | 0x1 |
| LOL | 0x1 |
| LOS | 0 |
| LOSXAXB | 0 |
| LOSXAXB_FLG | 0x1 |
| OOF | 0 |
| OOF (sticky) | 0xf |
| SMBUS_TIMEOUT | 0 |
| SMBUS_TIMEOUT_FLG | 0 |
| SYSINCAL | 0 |
| SYSINCAL_FLG | 0x1 |
| XAXB_ERR | 0 |
| XAXB_ERR_FLG | 0x1 |
+-------------------+-------+
(dbt-pyvenv) [st15719@bayban dev3]$ pdtbutler mst FAN_FIB_AFC synctime
Created device FAN_FIB_AFC
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fib |
| Board revision | kFIBRev1 |
| Board UID | 0x801f12f5e9ae |
| Carrier type | afc |
| Design type | fanout |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
Master FW rev: 0x50400, partitions: 4, channels: 5
2021-Aug-17 17:43:03,836 LOG [dunedaq::timing::PDIMasterNode::sync_timestamp(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/PDIMasterNode.cpp:273] Reading old timestamp: 0x970b6fa7, Thu, 01 Jan 1970 01:00:40 +0000
2021-Aug-17 17:43:03,845 LOG [dunedaq::timing::PDIMasterNode::sync_timestamp(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/PDIMasterNode.cpp:276] Setting new timestamp: 0x169c25ab552e260, Tue, 17 Aug 2021 17:43:03 +0000
2021-Aug-17 17:43:03,846 LOG [dunedaq::timing::PDIMasterNode::sync_timestamp(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/PDIMasterNode.cpp:281] Reading new timestamp: 0x169c25ab553094a, Tue, 17 Aug 2021 17:43:03 +0000
(dbt-pyvenv) [st15719@bayban dev3]$ pdtbutler mst FAN_FIB_AFC part 0 configure
Created device FAN_FIB_AFC
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fib |
| Board revision | kFIBRev1 |
| Board UID | 0x801f12f5e9ae |
| Carrier type | afc |
| Design type | fanout |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
Master FW rev: 0x50400, partitions: 4, channels: 5
Configuring partition 0
Trigger mask set to 0xf1
Fake mask 0x1
Phys mask 0xf
Partition 0 enabled and configured
(dbt-pyvenv) [st15719@bayban dev3]$ pdtbutler mst FAN_FIB_AFC part 0 status
Created device FAN_FIB_AFC
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fib |
| Board revision | kFIBRev1 |
| Board UID | 0x801f12f5e9ae |
| Carrier type | afc |
| Design type | fanout |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
Master FW rev: 0x50400, partitions: 4, channels: 5
-- Master state---
Timestamp: 0x169c25ad0db696c -> Tue, 17 Aug 2021 17:43:10 +0000
--------------Cmd gen counters--------------
+------+-----------------+-----------------+
| | Accept counters | Reject counters |
+------+-----------------+-----------------+
| Chan | cnts | hex | cnts | hex |
+------+--------+--------+--------+--------+
| 0x0 | 0 | 0 | 0 | 0 |
| 0x1 | 0 | 0 | 0 | 0 |
| 0x2 | 0 | 0 | 0 | 0 |
| 0x3 | 0 | 0 | 0 | 0 |
| 0x4 | 0 | 0 | 0 | 0 |
+------+--------+--------+--------+--------+
=> Partition 0
---------Controls--------
+---------------+-------+
| Register | Value |
+---------------+-------+
| buf_en | 0 |
| frag_mask | 0 |
| part_en | 0x1 |
| rate_ctrl_en | 0x1 |
| run_req | 0 |
| spill_gate_en | 0x1 |
| trig_ctr_rst | 0 |
| trig_en | 0 |
| trig_mask | 0xf1 |
+---------------+-------+
--------State-------
+----------+-------+
| Register | Value |
+----------+-------+
| buf_err | 0 |
| buf_warn | 0 |
| in_run | 0 |
| in_spill | 0 |
| part_up | 0x1 |
| run_int | 0 |
+----------+-------+
Event Counter: 0
Buffer status: OK
Buffer occupancy: 0
+-------------+-----------------+-----------------+
| | Accept counters | Reject counters |
+-------------+-----------------+-----------------+
| Cmd | cnts | hex | cnts | hex |
+-------------+--------+--------+--------+--------+
| TimeSync | 3 | 0x3 | 0 | 0 |
| Echo | 0 | 0 | 0 | 0 |
| SpillStart | 0 | 0 | 0 | 0 |
| SpillStop | 0 | 0 | 0 | 0 |
| RunStart | 0 | 0 | 0 | 0 |
| RunStop | 0 | 0 | 0 | 0 |
| WibCalib | 0 | 0 | 0 | 0 |
| SSPCalib | 0 | 0 | 0 | 0 |
| FakeTrig0 | 0 | 0 | 0 | 0 |
| FakeTrig1 | 0 | 0 | 0 | 0 |
| FakeTrig2 | 0 | 0 | 0 | 0 |
| FakeTrig3 | 0 | 0 | 0 | 0 |
| BeamTrig | 0 | 0 | 0 | 0 |
| NoBeamTrig | 0 | 0 | 0 | 0 |
| ExtFakeTrig | 0 | 0 | 0 | 0 |
+-------------+--------+--------+--------+--------+
The following master trigger commands executed successfully with the expected output, e.g. triggers generated at specified rate.
pdtbutler mst FAN_FIB_AFC faketrig-conf 0 0.5
pdtbutler mst FAN_FIB_AFC faketrig-conf 0 1
pdtbutler mst FAN_FIB_AFC faketrig-conf 0 2
pdtbutler mst FAN_FIB_AFC faketrig-clear 0
FMC
Firmware:
https://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v6.0.0/b2/latest/ouroboros_pc053d_fmc_relval-v6-0-0-b2_sha-3304ef99_runner-slu9p8x4-project-19909-concurrent-0_210812_1431.tgz
Software: relval/v6.0.0/b1
The following master setup commands executed successfully with the expected output.
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler io PRIMARY reset
Created device PRIMARY
Design 'ouroboros' on board 'fmc' on carrier 'enclustra-a35' with frequency 62.5 MHz
Resetting PRIMARY
2021-Aug-17 18:26:17,443 LOG [dunedaq::timing::FMCIONode::reset(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/FMCIONode.cpp:70] PLL configuration file : /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/install/timing/share/config/etc/clock/devel/Si5344-053master_312.5_mhz-Registers.txt
2021-Aug-17 18:26:19,932 LOG [dunedaq::timing::FMCIONode::reset(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/FMCIONode.cpp:84] Reset done
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fmc |
| Board revision | kFMCRev4 |
| Board UID | 0xd880395da48e |
| Carrier type | enclustra-a35 |
| Design type | ouroboros |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
------FMC IO state-----
+-------------+-------+
| Register | Value |
+-------------+-------+
| cdr_lol | 0 |
| cdr_los | 0 |
| mmcm_ok | 0x1 |
| mmcm_sticky | 0 |
| sfp_flt | 0 |
| sfp_los | 0 |
+-------------+-------+
PLL Clock frequency measurement:
PLL freq: 312.489961384
CDR freq: 249.994734762
PLL configuration id : 053mst31
-------PLL information------
+-----------------+--------+
| Register | Value |
+-----------------+--------+
| Device grade | 0 |
| Device revision | 0x3 |
| Part number | 0x5344 |
+-----------------+--------+
----------PLL state----------
+-------------------+-------+
| Register | Value |
+-------------------+-------+
| CAL_PLL | 0 |
| HOLD | 0x1 |
| LOL | 0x1 |
| LOS | 0 |
| LOSXAXB | 0 |
| LOSXAXB_FLG | 0x1 |
| OOF | 0 |
| OOF (sticky) | 0xf |
| SMBUS_TIMEOUT | 0 |
| SMBUS_TIMEOUT_FLG | 0 |
| SYSINCAL | 0 |
| SYSINCAL_FLG | 0x1 |
| XAXB_ERR | 0 |
| XAXB_ERR_FLG | 0x1 |
+-------------------+-------+
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler io PRIMARY synctime
Created device PRIMARY
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fmc |
| Board revision | kFMCRev4 |
| Board UID | 0xd880395da48e |
| Carrier type | enclustra-a35 |
| Design type | ouroboros |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
2021-Aug-17 18:26:24,173 LOG [dunedaq::timing::PDIMasterNode::sync_timestamp(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/PDIMasterNode.cpp:273] Reading old timestamp: 0xfd4a5ff, Thu, 01 Jan 1970 01:00:04 +0000
2021-Aug-17 18:26:24,177 LOG [dunedaq::timing::PDIMasterNode::sync_timestamp(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/PDIMasterNode.cpp:276] Setting new timestamp: 0x169c2808ecdc800, Tue, 17 Aug 2021 18:26:24 +0000
2021-Aug-17 18:26:24,177 LOG [dunedaq::timing::PDIMasterNode::sync_timestamp(...) at /projects/HEP_Instrumentation/st15719/dune/daq_280_dev/dev3/sourcecode/timing/src/PDIMasterNode.cpp:281] Reading new timestamp: 0x169c2808ecde1b2, Tue, 17 Aug 2021 18:26:24 +0000
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler mst PRIMARY part 0 configure
Created device PRIMARY
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fmc |
| Board revision | kFMCRev4 |
| Board UID | 0xd880395da48e |
| Carrier type | enclustra-a35 |
| Design type | ouroboros |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
Configuring partition 0
Trigger mask set to 0xf1
Fake mask 0x1
Phys mask 0xf
Partition 0 enabled and configured
(dbt-pyvenv) [st15719@cuthbert dev3]$ pdtbutler mst PRIMARY part 0 status
Created device PRIMARY
----------------Hardware info----------------
+--------------------------+----------------+
| Board type | fmc |
| Board revision | kFMCRev4 |
| Board UID | 0xd880395da48e |
| Carrier type | enclustra-a35 |
| Design type | ouroboros |
| Firmware frequency [MHz] | 62.500000 |
+--------------------------+----------------+
Master FW rev: 0x50500, partitions: 4, channels: 5
-- Master state---
Timestamp: 0x169c2809efcd326 -> Tue, 17 Aug 2021 18:26:28 +0000
--------------Cmd gen counters--------------
+------+-----------------+-----------------+
| | Accept counters | Reject counters |
+------+-----------------+-----------------+
| Chan | cnts | hex | cnts | hex |
+------+--------+--------+--------+--------+
| 0x0 | 0 | 0 | 0 | 0 |
| 0x1 | 0 | 0 | 0 | 0 |
| 0x2 | 0 | 0 | 0 | 0 |
| 0x3 | 0 | 0 | 0 | 0 |
| 0x4 | 0 | 0 | 0 | 0 |
+------+--------+--------+--------+--------+
=> Partition 0
---------Controls--------
+---------------+-------+
| Register | Value |
+---------------+-------+
| buf_en | 0 |
| frag_mask | 0 |
| part_en | 0x1 |
| rate_ctrl_en | 0x1 |
| run_req | 0 |
| spill_gate_en | 0x1 |
| trig_ctr_rst | 0 |
| trig_en | 0 |
| trig_mask | 0xf1 |
+---------------+-------+
--------State-------
+----------+-------+
| Register | Value |
+----------+-------+
| buf_err | 0 |
| buf_warn | 0 |
| in_run | 0 |
| in_spill | 0 |
| part_up | 0x1 |
| run_int | 0 |
+----------+-------+
Event Counter: 0
Buffer status: OK
Buffer occupancy: 0
+-------------+-----------------+-----------------+
| | Accept counters | Reject counters |
+-------------+-----------------+-----------------+
| Cmd | cnts | hex | cnts | hex |
+-------------+--------+--------+--------+--------+
| TimeSync | 4 | 0x4 | 0 | 0 |
| Echo | 0 | 0 | 0 | 0 |
| SpillStart | 0 | 0 | 0 | 0 |
| SpillStop | 0 | 0 | 0 | 0 |
| RunStart | 0 | 0 | 0 | 0 |
| RunStop | 0 | 0 | 0 | 0 |
| WibCalib | 0 | 0 | 0 | 0 |
| SSPCalib | 0 | 0 | 0 | 0 |
| FakeTrig0 | 0 | 0 | 0 | 0 |
| FakeTrig1 | 0 | 0 | 0 | 0 |
| FakeTrig2 | 0 | 0 | 0 | 0 |
| FakeTrig3 | 0 | 0 | 0 | 0 |
| BeamTrig | 0 | 0 | 0 | 0 |
| NoBeamTrig | 0 | 0 | 0 | 0 |
| ExtFakeTrig | 0 | 0 | 0 | 0 |
+-------------+--------+--------+--------+--------+
The following master trigger commands executed successfully with the expected output, e.g. triggers generated at specified rate.
pdtbutler mst PRIMARY faketrig-conf 0 0.5
pdtbutler mst PRIMARY faketrig-conf 0 1
pdtbutler mst PRIMARY faketrig-conf 0 2
pdtbutler mst PRIMARY faketrig-clear 0
--
StoyanMiroslavovTrilov - 2021-08-17