How to use phase-shifted pulses with CLICTD

The testpulse output runs in another clock domain than the pattern generator. It allows to shift the phase of the pulse with respect to DAQ clock. The clock source for the testpulse can be either the same as for DAQ clock or an independent clock source.

If an independent clock source is selected, the phase relation can not be defined and is always random.

If the same clock source is selected, the phase shift is fixed and can be controlled.

FPGA control registers

There are three FPGA registers related to it:

  • ps_shift
  • ps_num
  • ps_status

ps_shift

bit 0: (psgo) write-only, self-returns to 0 after writing 1; Shifts the clock phase by an offset specified in ps_num register in direction specified with psincdec bit of ps_shift register

bit 1: (psincdec) readable, writable; Defines the direction of the phase shift. 0 shifts forward, 1 shifts backward

bit 2: (csh_clk_in_sel): readable, writable; Selects the clock source. 0 = DAQ clock, 1 = independent clock

bit 3: (csh_reset): write-only, self-returns to 0 after writing 1; Resets the PLL and returns the phase shift to default.

ps_num

16-bit unsigned integer. Defines the phase shift step. The whole period is approximately 3360 steps.

ps_status

bit 0: (psactive) read-only; 1 = Phase transition on progress, 0 = No phase transition ongoing

bit 1: (csh_locked) read-only; 1 = PLL is locked, 0 = PLL is not locked

Peary virtual special registers

tp_phase

Write only. Sets the phase to the written value in degrees.

Writing an unsigned integer arg to this register does the following:

  • Recalculate the given value in degrees to the number of steps. Valid for 10ns clock.
  • Reset the PLL (csh_reset = 1) and set clock source to DAQ clock (csh_clk_in_sel = 0)
  • Set the number of steps to the given integer (ps_num = arg)
  • Start the phase shift (psgo = 1) with direction forward (psincdec = 0)

tp_phase_add

Write only. Adds the written value to the phase shift.

Writing an unsigned integer arg to this register does the following:

  • Recalculate the given value in degrees to the number of steps. Valid for 10ns clock.
  • Set the number of steps to the given integer (ps_num = arg)
  • Start the phase shift (psgo = 1) with direction forward (psincdec = 0)

tp_phase_sub

Write only. Subtracts the written value from the phase shift.

Writing an unsigned integer arg to this register does the following:

  • Recalculate the given value in degrees to the number of steps. Valid for 10ns clock.
  • Set the number of steps to the given integer (ps_num = arg)
  • Start the phase shift (psgo = 1) with direction backward (psincdec = 1)

tp_rand_clk

Writable, readable. Selects the clock source. 0 = DAQ clock, 1 = independent clock.
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Topic revision: r4 - 2020-05-22 - TomasVanat
 
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