Trigger Box Mapping

The authoritative version of this document is in the DreamTrigger.ucf file in the https://twiki.cern.ch/twiki/bin/view/DREAM/TriggerBox page

NIM in/out ch	type	name	comment	V262 (IO) ch	V513 (IO) ch	V814 (Discr.) ch
20	NIM output	nimFastGate 3	to DRS Trig input TR1
19	NIM output	nimFastGate 2	to DRS Trig input TR0
18	NIM output	daqTr2	to V976 fan-out
17	NIM output	daqTr1	to busy gate gen.
16	NIM output	isSpill			IN 2
15	NIM output	isPedTrig			IN 3
14	NIM output	nimFastGate 1	to Calorimeter ADC gate (0&1)
13	NIM output	isPhysTrig			IN 0
12	NIM output	T1T2	T1 & T2
11	NIM output	T1T2 _Vbar	T1 & T2 & not(Veto)
10	ECL input	fastClear	clear for nimFastGate			13
9	ECL input	T2				12
8	ECL input	T1				11
7	ECL input	veto				10
6	ECL input	ped	pedestal trigger			9
5	NIM input	nim_daqRes	DAQ reset	SHP OUT 0
4	NIM input	nim_ee	SPS EE signal
3	NIM input	nim_ww	SPS WW signal
2	NIM input	nim_enPed	pedestal enable	OUT 3
1	NIM input	nim_enable	trigger enable	OUT 0
-	-	busy	shaped daqTr1 (25 usec)		IN 1
-	-	DAQ clear	clears scaler (at run start)	SHP OUT 1

-- MicheleCascella - 2014-11-30

Topic revision: r4 - 2014-12-06 - RobertoFerrari1