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RICH UKL1 Operating Information


The team responsible for the operation of the RICH UKL1 system are Gareth Rogers, Hugh Skottowe and Steve Wotton.

The number of the RICH readout operations mobile is 163837

The UKL1 technical reference manual describes the hardware and firmware of the UKL1 boards. The document also describes the raw data format of the RICH detectors

Current and previous releases of the UKL1 firmware can be found in the firmware archive area.

Here you can find the list of UKL1's together with the column positions to which they are connected in spreadsheet form.

ALERT!The UKL1 crates may normally remain on but should be switched off when not in use for extended periods or in advance of scheduled power cuts.

Recent L1 problems and solutions

  • [Believed to be fixed. Nov. 2007] Sometimes a GBE card will not initialise correctly after power up and no data will arrive from the corresponding L1 module. The symptoms are no data packets from the offending module which will probably result in "Incomplete event" messages that implicate a single L1 module whose status is otherwise OK. To fix the problem run the program ukl1-cfg on every L1 board after the power is switched on and you are able to log in. You should then reload the FPGAs on each board and reconfigure. Please try to contact the expert first before trying this as there are other possible reasons for "Incomplete event" messages.

Controls (PVSS, FSM)

The UKL1 controls package for the UKL1 boards runs on the r1daq01 and r2daq01 controls PCs for RICH1 and RICH2 respectively. The UKL1 control panel can be started from the RICH console.

The L1 control interface is implemented in PVSS and is currently under development. This document will provide a quick start guide to using the UKL1 project, from installation to using the FSM. A more detailed overview of the UKL1 controls project can be found on the RichUkl1Controls page.

Quick start

Assuming that the project is running and there is a valid FSM tree the project can be started from the short cut R2DAQ01_UI_FSM in the directory /group/rich/oper/. When this panel loads select the RICH2_L1 (note RICH1_L1 for RICH1) the top level node from the tree, right click and then select view. If the boards are in the running state they can likely be left in that state. In case you think you need to do a complete reinitialisation (for example to load a specific recipe) all you have to do is:
  • Click the L1 state and select Stop from the top-level FSM menu.
  • Then select Reload from the FSM menu.
  • Wait about 5s (the UKL1 FPGAs are being reinitialised).
  • Select Configure from the FSM menu. You are asked to enter a run type in nearly all situations the PHYSICS run type should be used. This will configure the UKL1s in the current default settings.
  • Select Start from the FSM menu.

All the UKL1s should now be in the RUNNING state and are usable to take data. LHCb and ALICE run modes will also always be defined and these will configure the UKL1s in LHCb and ALICE pixel mode respectively.

Installing the project

The RICH1 UKL1 PVSS project should be installed on r1daq01 and RICH2 on r2daq01, the following guidelines assume that the relevant projects exist with the relevant framework components installed. How to install/update the UKL1 specific components is outlined here.

There are two packages that must be installed as part of the UKL1 installation procedure fwUkl1 and fwUkl1ExceptionHandling. They can be found in _lbRICHPackages/R1DAQL1 and _lbRICHPackages/R2DAQL1 (for RICH1 and RICH2 respectively), in this directory the extracted folders for the framework components should exist and the packages can be installed for RICH1 and RICH2 PVSS projects.

Both the fwUkl1 and fwUkl1ExceptionHandling are standard framework packages and can be installed using the standard framework component tools, link. They have the relevant dependencies defined and if a required framework component is not installed it should be installed before completing the installation of the component. fwUkl1 is dependent on fwUkl1ExceptionHandling so fwUkl1ExceptionHandling should be installed first.

It is advised to uninstall both packages before updating/reinstalling them and to restart the project after deletion and installation. Both run post install scripts, which in the case of fwUkl1 will ensure that the FSM tree is setup correctly.

Hardware and firmware notes

Rack control

Powering the L1 crate on or off can be done through PVSS or by logging on to r2daq01:

To turn on: /group/online/rackctrl/rackctrl start D3/D3C04U

To turn off: /group/online/rackctrl/rackctrl stop D3/D3C04U

For status: /group/online/rackctrl/rackctrl status D3/D3C04U

CCPC

The UKL1 CCPC servers for RICH1 and RICH2 are r1daq01 and r2daq01 respectively. The CCPCs themselves are called r1ukl1nn and r2ukl1nn.

Programs can be cross-compiled for the CCPCs on these machines. See the makefile in /group/rich/L1/src/ukl1cfg for examples.

Readout network

The UKL1 network parameters can be found here.

The RICH1 and RICH2 crates each have a Hugin board which is responsible for collating the throttle signals from the UKL1s. The slot number of the UKL1 in its crate corresponds to the port input number on the Hugin board. The table also provides a map of the RICH1 and 2 UKL1 name to slot/Hugin port position.

The UKL1s are assigned the following source IP addresses from the range indicated above:

CCPC IP address RICHSorted ascending Slot Alias
r1ukl101 192.169.14.1 RICH1 D3C01U/06 rxukl103
r1ukl102 192.169.14.2 RICH1 D3C01U/09 rxukl113
r1ukl103 192.169.14.3 RICH1 D3C01U/11 rxukl114
r1ukl104 192.169.14.4 RICH1 D3C01U/13 rxukl116
r1ukl105 192.169.14.5 RICH1 D3C01U/15 rxukl117
r1ukl106 192.169.14.6 RICH1 D3C01U/17 rxukl118
r1ukl107 192.169.14.7 RICH1 D3C01U/19 rxukl120
r2ukl101 192.169.1.1 RICH2 D3C04U/04 rxukl109
r2ukl102 192.169.1.2 RICH2 D3C04U/06 rxukl108
r2ukl103 192.169.1.3 RICH2 D3C04U/08 rxukl106
r2ukl104 192.169.1.4 RICH2 D3C04U/10 rxukl111
r2ukl105 192.169.1.5 RICH2 D3C04U/13 rxukl112
r2ukl106 192.169.1.6 RICH2 D3C04U/15 rxukl104
r2ukl107 192.169.1.7 RICH2 D3C04U/17 rxukl105
r2ukl108 192.169.1.8 RICH2 D3C04U/19 rxukl101
rxukl102 ??.??.??.?? SSB2 rxukl102
rxukl110 ??.??.??.?? SSB2 rxukl110

Special settings

A suitable value for the L1 TFC latency compensation register on the L1 boards (register 22=0x16) is 0x67 at the pit, instead of the 0x1e used in the SSB2 and in Cambridge.

For ALICE mode always use MEP packing factor equal to 1. To prevent buffer overflow always make sure that the throttle is working and that the ODIN trigger gap generation is set to the maximum value (15) instead of the value 1 used for normal LHCb running.

Firmware updates

Firmware can be updated using the Xilinx Platform USB cable connected to the front-panel JTAG port with the JTAG port select switch set to Ext. To update using the CCPC/GC interface put the switch into the GC position and run the following command on the CCPC:

  • jam -n3 -aRUN_XILINX_PROC filename

The process is slow and may take 1.5 hours but can be done on all boards simultaneously.

Tools and diagnostics

RICH L1 related software tools are maintained in the lbgw:/group/rich/L1/ tree:

  • src/ contains program source files
  • bin/ contains executable programs and shareable libraries
  • include/ contains common header files
  • java/jar/ Java applications

Here is a summary of a few existing tools:

  • ukl1-init - performs hardware initialisation and is required whenever the UKL1 board is powered (also done at CCPC boot time).
  • ukl1-cfg - configures the UKL1 board. Formerly ukl1cfg.
  • ukl1-status - dumps UKL1 status or configuration data. Formerly showStatus.
  • mdfReader - reads and summarises the content of MDF files.
  • ukl1-reload - trigger reload of UKL1 FPGAs. Formerly reloadL1.
  • ukl1-reset - pulse L1 reset signal. Formerly resetL1.
  • ukl1-rw - read or write registers in the UKL1 egress FPGA. Formerly l1fpga.
  • ukl1-gbereset - reset GBE card. Formerly resetGBE.
  • ukl1-gbeflush - flush GBE buffers. Formerly gbeFlush.
  • ukl1-gbestatus - dump some GBE status. Formerly gbeStatus.
  • ukl1-datacapture - capture L1 data from raw socket.
  • pbw.jar - An event display that can read non-compressed MDF files.
Note the new rationalised names for UKL1 utilities.

-- Steve Wotton - 01 Apr 2007

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Topic revision: r13 - 2008-03-13 - StephenWotton
 
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