EC Configuration Test Set-Up

This section briefly explains how to use the set-up to test if the CLARO configure properly, using Chimaera digital boards (DBs). The set-up is connected to PCLHCB164 in the SysLab. The program was developed by Steve Wotton.

  • A power supply with 3.3 V and about 270 mA has to be connected to the DB. The DB should be connected via USB to the computer and to the tested EC.
  • Using the lhcbrich account, the program is located in ~/JEcTester/ .
  • To start the program in a terminal, type java -Djava.library.path=. -jar JEcTester.jar .
  • The correct DB has to be selected from the drop-down menu.
  • The Configurator option in the Main menu allows selecting a CLARO configuration setting. The EC name has to be TESTER and the Preferences set to default.
  • After the CLAROs are configured, the configuration can be checked by doing Read preferences, Configure, and Check.
  • The CLARO SPI register values are written into the CLARO SPI readback area, 16 lines for each of the 16 CLARO chips.
  • If the configuration was successful, the register values should correspond to the configuration settings and the SPI panel should show a green colour.
  • The "Latches" panel shows the state of the internal CLARO channel latch bits in the configuration register.
  • The "Outputs" panel shows the current state of the CLARO digital outputs as sampled (without latching) by the FPGA.

-- MichelePieroBlago - 2017-12-13

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Topic revision: r3 - 2017-12-14 - StephenWotton
 
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