Board requirements / Functions

  • Hold the readout electronics for several SiPMs: 4 or 8 ?
  • Feed the biasing Voltage to the SiPMs (biasing resistor and coupling capacitors). The HV will be fed to the FE board through an external connector. How many HV channels will be necessary: 1 x SiPM / 1 x FE board ?
  • Transmit the output data to the TELL40 boards. Use GBTx or embed the GBTx modules in FPGAs (depends on the FE option used in the end). Send the data using the VTTx optical transcievers. We may be able to use a single GBTx for 2 FE chips in low occupancy regions.
  • Slow control to read SiPMs temperature sensors (1 temperature sensor x SiPM) and to configure the FE chips (1 FE chip x SiPM). A single GBT - SCA per FE board should be enough.

Mechanical constraints

  • Width = 32mm (width of single flex cable) x #!SiPMs
  • Height limited by isolation. Maximum of 30 mm
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Topic revision: r2 - 2018-11-27 - BlakeLeverington
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