This procedure describes how to perfom the "slice test", i.e. how to test the set of Control Board channel, TELL1 and cables associated to one VELO slot with a hybrid without a sensor.
The actual test
- Provide yourself with a test sheet for the slot you want to test.
- Check the already connected cables and establish the missing connections.
- Perform the digitisation delay scan.
- Analyse the data and derive the optimal timing.
- Apply the new settings to the TELL1.
- Perform the cable test
- Take a data file with test pulses.
- Take a data file without test pulses.
- Analyse the data.
- Turn off the Beetles and the Repeater Board if no further investigations are necessary.
- Fill in the test sheet.
- Leave an entry with all the results in the ELOG: http://lbweb01.cern.ch/Velo+PCB+tests
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Detailed explanations
- Check and connectorisation of the cables
- PVSS operation of the system
- Running the eventbuilder
- Digitisation delay scan
- Data analysis
In case of problems
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