Microblaze stuff

Board / FPGA

ISE/EDK Installation

First installed ISE, then EDK.

EDK notes

See also the EDK documentation page on xilinx.com.

Running the pre-build examples

  • in the dialog 'Base System Builder - Select Board' I selected Vendor = Xilinx and Board Name = Spartan-3E starter board. On the PCB, close to the bottom end of the hirose connector, I see 'REV D', so I chose Revision = D in the dialog.

  • I had a 'straight-through' (pin 2 -> pin 2, pin 3 -> pin 3, one male and one female connector) serial cable at hand. The female connector of the cable connects to the PC and the other connector can go into the board's female connector (called DCE in the starter's guide).

In the dialog 'Base System Builder - Software Setup' I thus changed STDIN and STDOUT from RS232_DTE to RS232_DCE.

  • To build the TestApp_Memory example , I did
    • 'Generate Bitstream' from the Hardware menu (this can take 30 minutes !)
    • 'Build Project' on the popup menu which appears when right-clicking on Project: TestApp_Memory
    • From the same menu, select 'Mark to Initialize BRAMs' (as described in the section 'Initializing an Executable in the Bitstream' in the help text)
    • From the 'Device Configuration' menu select 'Update bitstream'
    • Open hyperterminal with 9600 8N1 no handshake (on the port which is connected to the evaluation board)
    • From the same menu, select 'Download bitstream'
    • You should see the following message on the hyperterminal:
-- Entering main() --
Starting MemoryTest for DDR_SDRAM:
  Running 32-bit test...PASSED!
  Running 16-bit test...PASSED!
  Running 8-bit test...PASSED!
-- Exiting main() --

  • For the TestApp_Peripheral example, the above seems not to work.

  • The 'bootloop' method out of the box seems to be configured for usage with the debugger. In fact, right-clicking on 'Default: microblaze_0_bootlop' and then selecting 'View Source' reminds me of a program which is an infinite loop...

  • To start the debugger, one first has to start the 'debugger server' from the menu 'Debug' -> 'Launch XMD...' and then the client from the Menu 'Debug' -> 'Launch Software Debugger...'. With this, the TestApp_Peripheral application can be run.

  • The include directory for the C libraries is $XILINX_EDK\gnu\microblaze\nt\microblaze-xilinx-elf\include.

Adding custom peripherals (e.g. the picoblaze frequency counter)

Design flow

Programs which are used in the design flow (proj is the name of your project):

Program Description Input Output
bitinit ? proj.mhs ?
ngdbuild ? proj.bmm, implementation/proj.ngc, proj.ucf (inputs ??) proj.ngd (output ?)
map ? proj_map.ncd, proj.ngd (inputs ?) proj.pcf (output ?), proj_map.ngm
par Place and route ? proj_map.ncd, proj.pcf (inputs ?)  

See also this link (in the Floorplanner reference/user guide) for notes on design flows and this page for a graphical overview of the bulding process.

FPGA configuration for production (without PC)

See the corresponding chapter in Xilinx Platform Studio Help.

  • It looks like one has to use the file implementation/download.bit and convert it into an MCS file (using Impact), then flash this into the XCF04S.
    • This should also contain an bootloader application (e.g. bootloader_0), which therefore should be selected to initialize the BRAMs (???).
  • Under 'Device configuration', select 'program flash memory'. This seems to put the compiled c code into the strataflash ???
  • The file which is put into the application flash seems to called executable.elf.srec (in the main project directory).
    • This file can be generated in XPS from the menu Device Configuration -> Program Flash Memory. Make sure that you select executable.elf (and not executable.elf.srec as it is written there by default in some cases) in the File to program text input field. I also checked Auto-convert file to bootloaded and selected SREC in this dialog.

Linux on the Microblaze/Evaluation board

See here.

Software development cycle

  • Edit the source code
  • Build it with Software -> Build all user applications
  • Program the flash memory with Device configuration -> Program flash memory. Make sure that you select the correct (check the creation date) elf file, in this case it was the file TestApp_Memory/executable.elf. On the Program flash memory dialog, make sure the option Auto-convert file to bootloadable is checked and that the type next to it is SREC.
  • Load the new software version by pressing the PROG button on the evaluation board. In the serial port terminal program, you should see the following bootloader message
EDK Bootloader:
Bootloader: Processed (0x)00000094 S-records
where the number before S-records should be counting.


-- AndreHolzner - 24 Sep 2008

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Topic revision: r17 - 2009-01-05 - AndreHolzner
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