The files (and this logbook...) which this logbook refers can be found in

  • pcpoc08: /home/ams/pzuccon/Tkdev/Scripts/ + /home/ams/pzuccon/DAQ_Settembre2009_TKTest/DAQ + /home/ams/pzuccon/DAQ_Settembre2009_TKTest/DAQ/Data/ + /home/ams/pzuccon/DAQ_Settembre2009_TKTest/DAQ/Calibrations/
  • ams-farm.pg.infn.it: /amssw/duranti/TrackerCabling_092009/

Integration of the AMS02 Tracker: THE CABLING!

X Y Z OCT Crate ADDR NUM  
+ WAKE + 1 T0 0x033f 03  
- WAKE + 2 T1 0x093f 09  
- RAM + 4 T2 0x003f 00  
+ RAM + 3 T3 0x013f 01  
+ WAKE - 5 T4 0x103f 16  
- WAKE - 6 T5 0x113f 17  
- RAM - 8 T6 0x163f 22  
+ RAM - 7 T7 0x173f 23  



PwGroup:

1 2 3 4  
00 04 08 12 16 20 22 18 14 10 06 02  
01 05 09 13 17 11 23 19 15 11 07 03  



TkDBc is been updated the 23 October by Paolo following Rapin's istructions!
cabled
pre-screwing (balconies)
post-screwing (torque on screws)
cable fixing


Day Hour Calibration Crate Cabled Pre-screwing Post-scr. Cable-fix Notes
2009-10-24 10:34 CalDB _1256373111.root T4 4
2009-10-24 11:03 CalDB _1256374888.root T4 3,4
2009-10-24 11:41 CalDB _1256377101.root T4 1,2,3,4
2009-10-24 12:07 CalDB _1256378763.root T5 1,2
2009-10-24 14:42 CalDB _1256388036.root T5 1,2,3,4 Tdr 504 <--> 508
2009-10-24 16:34 CalDB _1256394816.root T4 1,2,3,4 3 PROBLEM: PwGroup 3 bias is absent!!! Dismounting and testing it
2009-10-24 17:12 CalDB _1256396952.root T6 1,2,3,4 (600 n-side is not in the CR Database (tkid=-807))
2009-10-24 18:01 CalDB _1256400048.root T5 1,2,3,4 3,4
2009-10-24 20:36 CalDB _1256409180.root T0 1
T1 4 Tdr 102 <--> 106, PROBLEM: 111 K-side ~ flat
2009-10-24 21:01 CalDB _1256410680.root T2 1
2009-10-24 21:24 CalDB _1256412128.root T3 4 Tdr 302 <--> 306
2009-10-24 21:30 CalDB _1256412580.root T1 4 simple check: the tdr 111 K-side is ~ flat yet
2009-10-25 09:31 CalDB _1256459374.root T4 1,2,3,4 1,2,3,4 checking the 3rd PwGroup (14,15,18,19 disconnected, 22,23 connected and OK!)
2009-10-25 10:10 CalDB _1256461785.root T5 1,2,3,4 1,2,3,4
2009-10-25 11:50 CalDB _1256467804.root T4 1,2,3,4 1,2,3,4 cheching PwGroup3 (14,15 disconnected, 18,19,22,23 connected, 22 damaged on VA 13,14)
T5 1,2,3,4 1,2,3,4
2009-10-25 12:07 CalDB _1256468806.root T4 1,2,3,4 1,2,3,4 cheching PwGroup3 (14,15,18,19,22,23 all connected)
2009-10-25 12:13 CalDB _1256469199.root T4 1,2,3,4 1,2,3,4 bias at 60 V on PwGroup 3 (15 is much better!!!) REMEMBER ME!
2009-10-25 12:45 CalDB _1256471096.root T0 1,2 Tdr 009 and 008 have bad behaviours (PwGroup 2 at 60V ?)
2009-10-25 15:11 CalDB _1256479835.root T6 1,2,3,4 1,2,3,4 Tdr 605 OK (current seems to be 0 but it's OK!?! (broken guard ring) )
2009-10-25 15:25 CalDB _1256480677.root T0 1,2,3,4 (Tdr 009 and 023 seems to have a quite large leakage current)
2009-10-25 15:40 CalDB _1256481603.root T2 1,2 Tdr 213 n-side a quite low pedestal
2009-10-25 16:00 CalDB _1256482781.root T4 1,2,3,4 1,2,3,4 1,2,3,4 (Tdr 415 high leakage current, the known problem (60 V))
2009-10-25 16:09 CalDB _1256483316.root T3 1,2,3,4 Tdr 306 <--> 302 (Trd 309 is the never seen tkid 410!!)
2009-10-25 16:23 CalDB _1256484188.root T7 1,2,3,4 Tdr 705 <--> 701 and Tdr 704 <--> 708
2009-10-25 16:34 CalDB _1256484837.root T2 1,2,3
2009-10-25 17:22 CalDB _1256487722.root T1 1,2,3,4 Tdr 102 <--> 106, Permane il problema di 111
T7 1,2,3,4 1,2,3,4 Problem with PwGroup 3: no bias!!!
2009-10-25 18:12 CalDB _1256490718.root T7 1,2,3,4 1,2,3,4 (18,19,22,23 connected, 14,15 disconnected) problem with the 18 cable.
2009-10-25 18:50 CalDB _1256492888.root T5 1,2,3,4 1,2,3,4 1,2,3,4 OK!
2009-10-25 19:00 CalDB _1256493567.root T5 1,2,3,4 1,2,3,4 1,2,3,4 Calibration second step + some data taking trials (failed)
2009-10-26 10:30 CalDB _1256549331.root T4 1,2,3,4 1,2,3,4 1,2,3,4 OK!
2009-10-26 11:48 CalDB _1256553600.root T6 1,2,3,4 1,2,3,4 1,2,3,4 OK!
2009-10-26 12:41 CalDB _1256557232.root T2 1,2,3,4 OK! (TDR 217 has the ADC-S2 that seems noiser)
2009-10-26 14:42 CalDB _1256564540.root T7 1,2,3,4 1,2,4 Tdr 718: pin 19 of K-side cable removed, only half of the analogical signal avaible.
Tdr 714-715 are disconnected (18,19,22,23)
2009-10-26 14:51 CalDB _1256565003.root T7 1,2,3,4 1,2,4 PwGroup 3 complete (14,15,18,19,22,23)
2009-10-26 15:19 CalDB _1256566707.root T1 1,2,3,4 Cavi definitivi su T1 Prova con tutte e 4 le porte
2009-10-26 15:54 CalDB _1256568782.root T2 1,2,3,4 Trigger is OK, 4JINJ-JINF AMSwire conn. OK!
T3 1,2,3,4 Trigger is OK, 4JINJ-JINF AMSwire conn. OK!
T7 1,2,3,4 1,2,3,4 Trigger is OK
2009-10-26 17:40 CalDB _1256575180.root T6 1,2,3,4 1,2,3,4 1,2,3,4 Trigger is OK, 4JINJ-JINF AMSwire conn. OK!
T7 1,2,3,4 1,2,3,4 1,2,3,4 Trigger is OK, 4JINJ-JINF AMSwire conn. OK!
T1 1,2,3,4 1,2,3,4 1,2,3,4 Check: the tdr 111 K-side is ~ flat yet
2009-10-26 18:11 CalDB _1256577006.root T1 1,2,3,4 1,2,3,4 1,2,3,4 Tdr 111 Prof. Rapin has moved the cables on the ladder side and the signal on K-side came back.
2009-10-27 10:10 CalDB _1256634574.root T3 1,2,3,4 1,2,3,4 Tdr 306 <--> 302 (Trd 309 is the never seen tkid 410!!)
2009-10-27 11:09 CalDB _1256637528.root T2 1,2,3,4 1,2,3,4 OK!
2009-10-27 10:10 CalDB _1256634574.root T3 1,2,3,4 1,2,3,4 Tdr 306 <--> 302 (Trd 309 is the never seen tkid 410!!)
2009-10-27 11:09 CalDB _1256637528.root T2 1,2,3,4 1,2,3,4 OK!
2009-10-27 14:24 CalDB _1256649823.root T2 1,2,3,4 1,2,3,4 1,2,3,4 OK! (no slowgui!)
T3 1,2,3,4 1,2,3,4 1,2,3,4 OK! (no slowgui!)
2009-10-27 20:07 CalDB _1256670144.root T0 1,2,3,4 1,2,3,4 1,2,3,4 PROBLEM: PwGroup 3 NO BIAS!! Trigger OK, 4JINJ-JINF AMSwire conn. OK!
T1 1,2,3,4 1,2,3,4 1,2,3,4 OK! Trigger OK, 4JINJ-JINF AMSwire conn. OK!
2009-10-27 20:57 CalDB _1256673408.root T0 1,2,3,4 1,2,3,4 1,2,3,4 Tdr 023 K side is gone.
2009-10-27 21:04 CalDB _1256673790.root T0 1,2,3,4 1,2,3,4 1,2,3,4 At 60 V. Tdr 023 is gone anyway! Disconnecting it.
2009-10-28 11:43 CalDB _1256726552.root T0 1,2,3,4 1,2,3,4 1,2,3,4 Tdr 023 K-side is flat, S-side is back!!!
2009-10-28 11:48 CalDB _1256726876.root T0 1,2,3,4 1,2,3,4 1,2,3,4 At 60V. More or less the same.
2009-10-28 21:41 CalDB _1256762383.root T0 1,2,3,4 1,2,3,4 1,2,3,4 Ladder 022 and 023 cablings are swapped: ladder 023 is OK, tdr 023 is KO
2009-10-28 21:49 CalDB _1256762913.root T0 1,2,3,4 1,2,3,4 1,2,3,4 (another calibration in the same condition)
2009-10-28 22:43 CalDB _1256766192.root T0 1,2,3,4 1,2,3,4 1,2,3,4 Substituting 1st TDR2 board on the 3rd PwGroup. Now Tdr 022 (ex 023) is OK.
2009-10-28 23:03 CalDB _1256767362.root T0 1,2,3,4 1,2,3,4 1,2,3,4 Tdrs 022, 023 are back!!!
2009-10-28 23:25 CalDB _1256768721.root T0 1,2,3,4 1,2,3,4 1,2,3,4 Balcony Tdrs 022, 023 are OK
2009-10-28 23:33 CalDB _1256769142.root All Crates Tdr 109 has no S-side (ADC flat). The other 191 are OK.
2009-10-28 23:58 CalDB _1256770685.root All Crates Tdr 109 has no S-side (ADC flat). The other 191 are OK.
Tdr 109 re-fixing cables ...
2009-10-29 06:31 CalDB _1256794187.root All Crates OK
2009-10-29 09:09 CalDB _1256803680.root All Crates OK
2009-10-29 10:00 CalDB _1256806708.root All Crates (29 degrees) OK!!!

T4 trigger is swapped with S2!!!!
T7 trigger is swapped with T6!!!
Basili said that the problem is known

Prova dei piedistalli dinamici: accendere 2 crate 1 con piedistalli dinamici e uno no, vederne l'evoluzione temporale rispetto a una calibrazione!



SUMMARY:
- Crate 4 PwGroup 3 at 60 V bias
- Tdr 605 OK (current seems to be 0 but it's OK! (broken guard ring))
- The swapping are all OK, Paolo should update the TkDBc (maybe this is under control)
102 <--> 106
302 <--> 306
504 <--> 508
705 <--> 701
704 <--> 708
023 <--> 022
- Tdr 718 has half signal

--- LASER TEST ---
Chapter 1
2009-10-26 21:01 1256587282.dat
2009-10-26 21:04 1256587470.dat with Laser (20 mA, delay 2500 ns) Tdr 409 S: 700 ADC K: 2100 ADC
2009-10-26 21:35 1256589298.dat with Laser (20 mA, delay 1500 ns) Tdr 409 S: 500 ADC K: 2500 ADC
2009-10-26 21:45 1256589940.dat with Laser (20 mA, delay 3500 ns) Tdr 409 S: 700 ADC K: 2100 ADC
2009-10-26 21:49 1256590150.dat with Laser (20 mA, delay 1500 ns) Tdr 409 S: 700 ADC K: 2100 ADC
2009-10-26 21:54 1256590453.dat with Laser (20 mA, delay 10 us) Tdr 409 S: 700 ADC K: 2100 ADC
2009-10-26 21:56 1256590579.dat with Laser (20 mA, delay 500 ns) Tdr 409 S: 700 ADC K: 2100 ADC
Maybe the delay is not setted by our program!!!

Chapter 2
2009-10-27 12:15 1256642102.dat T4 Calibration
2009-10-27 12:16 1256642144.dat T4 Run with laser 20 mA
2009-10-27 12:44 1256643826.dat T4 Calibration
2009-10-27 12:44 1256643862.dat T4 Run with laser (?)
2009-10-27 12:48 1256644081.dat T4
2009-10-27 13:35 1256646915.dat T4 CAL
2009-10-27 13:36 1256646947.dat T4 Run with laser (?)
2009-10-27 13:46 1256647594.dat T4 CAL
2009-10-27 13:47 1256647627.dat T4 Run with laser (?)
2009-10-27 13:57 1256648210.dat T4 LASER CALIBRATION
2009-10-27 13:58 1256648272.dat T4 LASER CALIBRATION
2009-10-27 14:00 1256648411.dat T4 LASER CALIBRATION

Chapter 3
2009-10-27 20:16 1256670926 CAL T2 T6
2009-10-27 20:25 1256671399 LAS T2 T6
2009-10-27 20:28 1256671680 CAL T2 T6
2009-10-27 20:31 1256671718 LAS T2 T6
2009-10-27 20:39 1256672306 CAL T2 T6
2009-10-27 20:41 1256672343 LAS T2 T6
2009-10-27 20:46 1256672663 CAL T2 T6
2009-10-27 20:49 1256672853 LAS T2 T6
2009-10-27 21:16 1256674355 CAL T2 T6
2009-10-27 21:17 1256674484 LAS T2 T6
2009-10-27 21:34 1256675654 CAL T2 T6
2009-10-27 21:37 1256675712 LAS T2 T6
Obscured 1 LDDR

Chapter 4
2009-10-28 13:21 CalDB _1256732406.root T2 T6
2009-10-28 13:24 data_1256732444.root T2 T6
2009-10-28 13:24 CalDB _1256732536.root T2 T6
2009-10-28 13:25 data_1256732576.root T2 T6
2009-10-28 13:30 CalDB _1256732921.root T0 T4 PwGroup 3 at 60V
2009-10-28 13:32 data_1256732964.root T0 T4
2009-10-28 13:35 CalDB _1256733059.root T0 T4
2009-10-28 13:37 data_1256733257.root T0 T4 Maybe a laser peak is disappeared on the 4th plane
2009-10-28 13:39 CalDB _1256733464.root T0 T4
2009-10-28 13:42 data_1256733534.root T0 T4
2009-10-28 13:46 CalDB _1256733868.root T0 T4
2009-10-28 13:47 data_1256733934.root T0 T4 Similar to 1256733257 with an higher intensity
2009-10-28 13:54 CalDB _1256734163.root T0 T4
2009-10-28 13:56 data_1256734405.root T0 T4
2009-10-28 14:01 CalDB _1256734785.root T0 T4
2009-10-28 14:02 data_1256734820.root T0 T4
2009-10-28 14:03 CalDB _1256734948.root T0 T4
2009-10-28 14:05 data_1256734980.root T0 T4
2009-10-28 14:06 CalDB _1256735058.root T0 T4
2009-10-28 14:08 data_1256735098.root T0 T4
2009-10-28 14:09 CalDB _1256735214.root T0 T4
2009-10-28 14:12 data_1256735267.root T0 T4
2009-10-28 14:21 CalDB _1256735968.root T3 T7
2009-10-28 14:23 data_1256736011.root T3 T7
2009-10-28 14:23 CalDB _1256736090.root T3 T7
2009-10-28 14:26 data_1256736133.root T3 T7
2009-10-28 14:26 CalDB _1256736313.root T3 T7
2009-10-28 14:28 data_1256736350.root T3 T7
2009-10-28 14:28 CalDB _1256736433.root T3 T7
2009-10-28 14:30 data_1256736475.root T3 T7
2009-10-28 14:36 CalDB _1256736878.root T1 T2 T5 T6
2009-10-28 14:37 data_1256736926.root T1 T2 T5 T6
2009-10-28 14:39 CalDB _1256737066.root T1 T2 T5 T6
2009-10-28 14:40 data_1256737126.root T1 T2 T5 T6
2009-10-28 14:42 CalDB _1256737243.root T1 T2 T5 T6
2009-10-28 14:43 data_1256737300.root T1 T2 T5 T6

-- MatteoDuranti - 09-Dec-2009

Topic attachments
I Attachment History Action Size Date Who Comment
PDFpdf CalMore.pdf r1 manage 5685.4 K 2009-12-14 - 22:19 MatteoDuranti CalMore reference at the end of cabling
PDFpdf Calibration.pdf r1 manage 6802.4 K 2009-12-14 - 21:56 MatteoDuranti Calibrations reference at the end of cabling
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Topic revision: r7 - 2009-12-23 - AlbertoOliva
 
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