This is the TWIKI page of ISOTDAQ2020 in Valencia

The main purpose of this Twiki is to share information relevant for the organization of the school

Related Web sites

School home page:

SharePoint site: TBD

Key dates

1 August (or 1 September): start of publicity
1 November: End of application period (if needed: 15 November)
1 November: Start of evaluation period
15 November: Notification of the students (at the latest)
13 January: Start of the school

Action items

Item target date to be done by Done Remarks
Establish a financial plan 1 July Local organizers in progress -
Update the new e-group "" 1 August Markus no RUHL colleagues have to be removed
Create a Web site 1 August Local organizers TBD Includes a tentative schedule - indico page created
Create a poster 1 August Local organizers TBD -
Look for sponsors - COC, LOC, volunteers in progress -
Open CERN conference account 1 August BvH TBD -
Organize Kick-Off meeting 1 July BvH TBD -
Collect channels for making publicity 1 August All TBD -
Start publicity campaign 1 August All TBD -
Confirm the availability of the lecturers and tutors 1 October COC TBD -
Look for new tutors to fill the holes 1 October COC TBD -
Look for new lecturers to fill the holes 1 October COC TBD -
Organize training of new tutors 1 October COC TBD -
Set up the exercises by using local material 1 November All no experienced tutors to provide help
Shipping of material to Valencia 1 December COC no What will be shipped depends on the available of material in Valencia

Issues for later

  • Decide on policy for funding the travel of tutors and lecturers

Teachers and tutors - Availability for ISOTDAQ2020

Name Availability 2020 Arrival and departure dates Funding
Alessandro Marchioro (CERN)     CERN
Markus Joos (CERN /ATLAS) YES   CERN
Enrico Pasqualucci (INFN/ATLAS)     INFN
Francesca Pastore (RHUL/ ATLAS)     RHUL
Hannes Sakulin (CERN/CMS) YES   CERN
Andrea Negri (INFN/ATLAS)     INFN
Kostas Kordas     A.U.Thessaloniki & ISOTDAQ
Mauricio Feo     NIKHEF & ISOTDAQ
Roberto Ferrari     INFN
Manoel Barros Marin YES   CERN & ISOTDAQ
Gokhan Unel     UCI
Martin Purschke YES   ISOTDAQ & BNL
Serguei Kolos     ISOTDAQ & UCI
Paolo Durante     CERN
Fabrice Le Goff YES   CERN
Alessandro Thea (RAL/CMS)     RAL
Barthélémy von Haller     CERN
Petr Zejdl     CERN
Tommaso Colombo     CERN
Gianluca Lamanna     INFN & ISOTDAQ
Dominique Gigi     CERN
Sophie Baron     CERN
Jan Dreyling-Eschweiler     DESY
Adam Abed Abud YES   CERN
Gary Boorman     CERN
Andrew Rose     Imperial College
Adriaan Rijllart YES   CERN
Danilo Cicalese     CERN
Wojciech Brylinski     ISOTDAQ
Marc Dobson     CERN
Cristovao Beirao     CERN & ISOTDAQ
Vincenzo Izzo (INFN/ATLAS)     INFN
Giovanna Lehmann Miotto     CERN
Johannes Martin Wuthrich     ETHZ & ISOTDAQ
Piotr Wysocki     INTEL

Overview of lectures

Number Duration Day Title (RHUL) Lecturer 2019 confirmed or likely Lecturer 2020 (Valencia)
1 60 TBD Introduction to data acquisition Andrea Negri  
2 60 TBD Networking for data acquisition systems Fabrice Le Goff  
3 60 TBD Introduction to VME bus Markus Joos Markus Joos
4 60 TBD Introduction to trigger Alessandro Thea  
5 60 TBD Trigger hardware Andrew Rose  
6 60 TBD Microcontrollers Mauricio Feo  
7 60 TBD PCIexpress Paolo Durante  
8 60 TBD Introduction to FPGAs Hannes Sakulin Hannes Sakulin
9 60 TBD Modular electronics Markus Joos Markus Joos
10 60 TBD DAQ hardware Vincenzo Izzo  
11 60 TBD LabVIEW Gary Boorman Gary Boorman or Adriaan Rijllart
12 60 TBD Introduction to detector readout Gokhan Unel  
13 60 TBD Timing for DAQ Sophie Baron  
14 60 TBD Programming for today's physicist and engineers Alessandro Thea  
15 60 TBD TDAQ design: from test beam to medium size experiment Roberto Ferrari  
16 60 TBD DAQ software Enrico Pasqualucci  
17 60 TBD Optical links Paolo Durante  
18 60 TBD A scalable, portable DAQ system design Martin Purschke  
19 60 TBD An Introduction to medical imaging devices Martin Purschke  
20 120 TBD Microelectronic technologies for HEP Instrumentation Alessandro Marchioro  
21 60 TBD GPU in HEP: online high quality trigger processing Gianluca Lamanna  
22 60 TBD Design and implementation of a monitoring system Serguei Kolos  
23 60 TBD Intelligent triggering: pattern recognition with Associative Memories and other tools Kostas Kordas  
24 60 TBD The Trigger and DAQ system of the EUDET-type beam telescopes Jan Dreyling-Eschweiler  
25 60 TBD Continuous DAQ systems (DUNE, protoDUNE) Giovanna Lehmann-Miotto  
26 60 TBD Advanced FPGA programming Manoel Barros Marin  
27 60 TBD T/DAQ for the LHC experiments and upgrades Francesca Pastore  
28 60 TBD What LHC TDAQ can learn from Facebook Manos Karpathiotakis  
29 60 TBD Strategies on storage from Intel Piotr Wysocki  

Candidate lectures and lecturers

Title / subject of the lecture Potential speaker Additional information
"Introduction to FPGA" or "FPGA101, basics of VHDL" or "TDAQ DUNE" Kunal Kothekar ISOTDAQ 2019 student
Waveform Digitizing and Signal Processing Stefan Ritt, PSI - Gary Eric Boorman also proposed to do it (2019) not available this year
TBD Jacopo Pinzino ISOTDAQ 2012
Machine learning with FPGAs Sioni Paris Summers expert FPGA, from CMS L1, Imperial College
TBD Andrew Rose (Imperial) CMS L1 (Particle Flow in FPGA)
Threaded programming and trigger/reco software Stuart Martin-Haugh (RAL) ATLAS Trigger Core Software Co-Convener
Project management Will ?  
Storage systems for DAQ Adam Abed Abud (Liverpool/CERN)  

Status of the labs

Availability of tutors and equipment

Lab CERN responsible Description Confirmed / Likely Tutors 2020 Orphaned sessions Equipment to be provided by Valencia Lab Book
1 Joos VMEbus programming Joos 0 1 monitor (with DVI-I cable), 1 keyboard (USB) and one mouse (USB) TBD
2 Joos NIM Pastore, Negri, Izzo 0 One digital oscilloscope and one function generator. One voltmeter and a tiny screw driver TBD
3 Joos NIM & scintillator Ferrari, Kordas 0 One digital oscilloscope, one voltmeter, one tiny screw driver TBD
4 Joos Muon DAQ Pasqualucci, Beirao 0 1 monitor (with DVI-I cable), 1 keyboard (USB) and one mouse (USB) TBD
5 Sakulin FPGA Gigi / Zejdl 0 1 monitor (VGA), 1 keyboard (USB) and one mouse (USB) TBD
6 Sakulin MicroTCA Sakulin / Dobson 0 1 monitor (VGA), 1 keyboard (USB) and one mouse (USB) TBD
7 Durante LabView Rijllart maybe with help from Boorman 0 1 monitor (VGA or HDMI (not yet defined)), 1 keyboard (USB) and one mouse (USB), 1 Power Cable TBD
8 Durante ADCs Barros Marin 0 One digital oscilloscope (possibly high-end),1 monitor (VGA or HDMI (not yet defined)), 1 keyboard (USB) and one mouse (USB) TBD
9 von Haller Networking Le Goff, Abed Abud 0 1 monitor with VGA cable (and power), 1 keyboard, 1 mouse, 4 power chords (for our computers and switch) Done (Gitlab)
10 Sakulin Microcontroller Feo, von Haller 0 1 PC with internet access (+FullHD screen, keyboard, mouse), 1 generic power supply with banana plugs (up to 12V/3A), 1 support stand + 2 clamps similar to the attached image. TBD
11 Durante Storage systems Durante, Colombo 0 1 monitor (VGA), 1 keyboard (USB) and one mouse (USB) for the server we'll ship, plus one desktop so more than one student can do the exercise in parallel TBD
12 von Haller Control systems Brylinski, Cicalese 0 2 Desktop PCs running CC7 connected to the network, 2 monitors (with DVI cable), 2 keyboards (USB) and two mouse (USB) TBD
13 Durante SoC FPGA Wuthrich 0 2 monitors (VGA), 2 keyboards (USB), 2 mouses (USB) TBD
14 von Haller GPU Lamanna 0 mouse, keyboard and a large monitor TBD

General: 20-30 power cords

GitLab repository for the labs

Candidate labs

Title / subject of the lap Proposed by Additional information
beam telescope Hendrik Jansen (DESY) proposal from 2015. Was not in the program of Vienna
Chip design   As a secret lab
unclear Jubin MITRA could he take over the lecture from Sophie

Candidate tutors

Name Background Interested in exercise financial status
Kunal Kothekar ISOTDAQ2019 FPGA Basics (5) or ADC Basics for TDAQ (8) UNCLEAR
Marcelo Vicente ISOTDAQ2015 FPGA (ex13) UNCLEAR
Ioannis Xiotidis ISOTDAQ2016 2 (or 5) UNCLEAR
Suerfu Burkhant<> ISOTDAQ 2017 5, 10 and others unclear
Jacopo Pinzino ISOTDAQ 2012 5, 14 (or others) had volunteered in 2019 for the SoC lab but came too late. Contact him for the 2020 edition
Sioni Paris Summers CMS L1, FPGA expert any, interest in FPGA and MC no travel (London)
Simone Bologna ISOTDAQ 2019 student Microcontroller (10), Mauricio knows him unclear
George Gimas ISOTDAQ 2019 student SoC (13) unclear
Christos Bakalis ISOTDAQ 2019 student FPGA (also as lecturer) unclear

Checklist for the local organizers

This is based on the feedback collected in 2018.

  • Check lab book before printing
  • WIFI in hotel is important
  • Dinner should be on the last day or the day before the free day
  • Bigger screens for the labs
  • Bigger room for labs
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Topic revision: r16 - 2019-08-08 - MarkusJoos
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