Name of the exercise

VMEbus protocol

Responsible for the exercise

Markus Joos

Description of the exercise

Using the program developed in Exercise 1 and a VMEbus analyzer the students will discover how the VMEbus cycles look like on the backplane. They will understand the timing elements of the VMEbus handshake and the H/W and S/W overheads involved in the data transfers. They will also learn how to use a bus analyzer to look for special events such as bus errors and how to relate them to the code of the application that triggered them.

What will the students learn

  • Using a bus analyser
  • VMEbus protocol (as an exapmle for a parallel bus)

Duration

2 hours.

List of material

H/W:
  • 1 VMEbus crate
  • 1 CCT SBC
  • 1 VMEbus D32/MBLT memory module
  • 1 VMEbus display module
  • 1 VMEtro VBT325
  • 1 Falco Terminal or a PC with a termonal emulator (e.g. minicom)
S/W:
  • Linux file system and gcc compiler / linker
  • vme_rcc, cmem_rcc and io_rcc driver
  • TDAQ RCD S/W (vme_rcc and related libraries)
  • The code developed in exercise 1

Relevant Information

  • The students have heard the lecture on modular electronics
  • The students have to have compelted exercise 1
  • The students should have read: TBD
Installation guide. TBD
Instruction sheet. TBD

Solution

TBD

Remarks

The use of the bus analyzer and the prossibilities it offers may be difficult to describe in the instruction sheet. Therefore the tutor of this exercise should be familiar with the VBT325 and the VMEbus protocol as he may have to guide the students.

-- MarkusJoos - 2009-08-21

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Topic revision: r1 - 2009-08-21 - MarkusJoos
 
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