Name of the exercise

VLSI Design Basics

Responsible for the exercise

Michal Bochenek, O. Cobanoglu

Description of the exercise

In this exercise students will build a very simple electronic circuit (an inverter or a logic gate) using a freeware software dedicated for the VLSI design. The exercise will be divided into four main parts:

1. Preparing a schematic view of the circuit and checking its functionality by running DC and transient simulations,

2. Drawing a layout of the device,

3. Making a full check of the technology design rules (DRC), layout versus schematic (LVS) and extracting parasitic structures afterwards,

4. Running a post-layout simulation with the extracted view and comparing them with the ideal case (described in the books) and results obtained from the models during the simulations made in step 1.

What will the students learn

The main output:

1. Knowledge, how to build a simulation cell for testing a simple circuit,

2. Will help students to realize how does the VLSI circuit look in on a real chip,

3. To realize how big is the difference between an ideal case and a real circuit designed on a piece of silicon.

Duration

2-3 hours.

List of material

  • xxx
  • xxx
  • xxx

Relevant information

  • The lab is accompanied by a relevant set of homework.
  • Related lectures (typically the exercises will take place after the related lectures)
  • The manuals of the device and S/W package used in the exercise
  • An installation guide. This document is for the supervisor of the exercise. It has to describe in detail how the material has to be set up before the exercise can start (S/W installation, etc.)
  • An instruction sheet. This document is for the students and tells them what they have to do

Solution

  • At least one of possible solutions will be provided.

-- OzgurCobanoglu - 19-Apr-2010

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Topic revision: r3 - 2020-08-30 - TWikiAdminUser
 
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