L1Menu_Collisions2015_25nsStage1_v7_uGT

Introduction

Trigger Menu Interface Key File Name Revision Compatible releases Date Obs
L1Menu_Collisions2015_25nsStage1_v7_uGT N/A Rev. 0.1 >= 3_3_3 FIXME   XML version, Rev. FIXME

Menu availability in a CMSSW job

List and description of algorithm and technical triggers

A complete description of the algorithm and technical trigger implementation is available in the attached HTML Description of L1 Menu. UPDATED

L1 menu identification

"!!!!!not sure how to get these from menu!!!!!"

L1 Trigger Menu Interface: FIXME
L1 Trigger Menu Name: L1Menu_Collisions2015_25nsStage1_v7_uGT
L1 Trigger Menu Implementation: FIXME
Associated L1 scale DB key: FIXME

Summary

  • Number of algorithm triggers: 104 defined, FIXME possible.
  • Number of technical triggers: defined, possible.

  • Number of free bits for algorithm triggers:
  • Number of free bits for technical triggers:

Number of algorithm triggers per trigger group:

Trigger group Number of bits used
TotalEt algorithm triggers: 3
DoubleMuon algorithm triggers: 7
DoubleEgamma algorithm triggers: 5
DoubleTau algorithm triggers: 5
SingleEgamma algorithm triggers: 21
TripleJet algorithm triggers: 2
QuadJet algorithm triggers: 3
SingleJet algorithm triggers: 15
DoubleJet algorithm triggers: 11
MissingEt algorithm triggers: 7
SingleMuon algorithm triggers: 18
SingleTau algorithm triggers: 4
QuadMuon algorithm triggers: 1
TripleEgamma algorithm triggers: 1
TotalHt algorithm triggers: 8
TripleMuon algorithm triggers: 2

 

List of algorithm triggers sorted by trigger groups

 

TotalEt algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_ETT60 L1_ETT60 8  
L1_ETT40 L1_ETT40 7  
L1_ETT15_BptxAND L1_ETT15_BptxAND 6  
TotalEt algorithm triggers: 3 bits defined

DoubleMuon algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_DoubleMu_10_Open L1_DoubleMu_10_Open 37  
L1_DoubleMu_12_5 L1_DoubleMu_12_5 103  
L1_DoubleMu6_EG6 L1_DoubleMu6_EG6 80  
L1_DoubleMu7_EG7 L1_DoubleMu7_EG7 75  
L1_DoubleMu_10_3p5 L1_DoubleMu_10_3p5 38  
L1_DoubleMuOpen L1_DoubleMuOpen 27  
L1_DoubleMu0 L1_DoubleMu0 25  
DoubleMuon algorithm triggers: 7 bits defined

DoubleEgamma algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_DoubleEG6_HTT150 L1_DoubleEG6_HTT150 82  
L1_DoubleEG_15_10 L1_DoubleEG_15_10 89  
L1_Mu5_DoubleEG5 L1_Mu5_DoubleEG5 81  
L1_DoubleEG_22_10 L1_DoubleEG_22_10 90  
L1_Mu6_DoubleEG10 L1_Mu6_DoubleEG10 68  
DoubleEgamma algorithm triggers: 5 bits defined

DoubleTau algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_DoubleIsoTau32er L1_DoubleIsoTau32er 23  
L1_DoubleIsoTau36er L1_DoubleIsoTau36er 98  
L1_DoubleTauJet40er L1_DoubleTauJet40er 12  
L1_DoubleIsoTau40er L1_DoubleIsoTau40er 99  
L1_DoubleIsoTau28er L1_DoubleIsoTau28er 97  
DoubleTau algorithm triggers: 5 bits defined

SingleEgamma algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_SingleIsoEG18er L1_SingleIsoEG18er 43  
L1_SingleIsoEG20 L1_SingleIsoEG20 15  
L1_SingleIsoEG25 L1_SingleIsoEG25 29  
L1_EG25er_HTT100 L1_EG25er_HTT100 26  
L1_Mu12_EG10 L1_Mu12_EG10 10  
L1_SingleEG5 L1_SingleEG5 40  
L1_SingleIsoEG25er L1_SingleIsoEG25er 28  
L1_SingleEG15 L1_SingleEG15 5  
L1_Mu4_EG18 L1_Mu4_EG18 78  
L1_Mu5_EG20 L1_Mu5_EG20 66  
L1_SingleEG25 L1_SingleEG25 41  
L1_Mu5_IsoEG18 L1_Mu5_IsoEG18 67  
L1_SingleIsoEG22er L1_SingleIsoEG22er 32  
L1_SingleEG30 L1_SingleEG30 46  
L1_SingleEG35 L1_SingleEG35 47  
L1_DoubleMu6_EG6 L1_DoubleMu6_EG6 80  
L1_DoubleMu7_EG7 L1_DoubleMu7_EG7 75  
L1_SingleEG40 L1_SingleEG40 42  
L1_SingleIsoEG20er L1_SingleIsoEG20er 44  
L1_SingleIsoEG30er L1_SingleIsoEG30er 30  
L1_SingleEG2_BptxAND L1_SingleEG2_BptxAND 3  
SingleEgamma algorithm triggers: 21 bits defined

TripleJet algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
TripleJet algorithm triggers: 2 bits defined

QuadJet algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_QuadJetC40 L1_QuadJetC40 39  
L1_QuadJetC36_TauJet52 L1_QuadJetC36_TauJet52 83  
L1_QuadJetC60 L1_QuadJetC60 94  
QuadJet algorithm triggers: 3 bits defined

SingleJet algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_SingleJet128 L1_SingleJet128 19  
L1_SingleJetC32_NotBptxOR_BxOffset0And1 L1_SingleJetC32_NotBptxOR_BxOffset0And1 69  
L1_SingleJetC20_NotBptxOR_BxOffset0And1 L1_SingleJetC20_NotBptxOR_BxOffset0And1 95  
L1_SingleJet68 L1_SingleJet68 17  
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_SingleS1Jet36 L1_SingleS1Jet36 22  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
L1_SingleS1Jet176 L1_SingleS1Jet176 20  
L1_SingleS1Jet200 L1_SingleS1Jet200 21  
L1_SingleS1Jet92 L1_SingleS1Jet92 18  
L1_SingleJet52 L1_SingleJet52 16  
SingleJet algorithm triggers: 15 bits defined

DoubleJet algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_DoubleJetC56_ETM60 L1_DoubleJetC56_ETM60 96  
L1_DoubleJetC84 L1_DoubleJetC84 34  
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100  
L1_DoubleJetC52 L1_DoubleJetC52 33  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101  
L1_DoubleS1JetC112 L1_DoubleS1JetC112 36  
L1_DoubleJetC100 L1_DoubleJetC100 93  
DoubleJet algorithm triggers: 11 bits defined

MissingEt algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_ETM100 L1_ETM100 60  
L1_ETM40 L1_ETM40 70  
L1_DoubleJetC56_ETM60 L1_DoubleJetC56_ETM60 96  
L1_ETM50 L1_ETM50 58  
L1_Mu0er_ETM55 L1_Mu0er_ETM55 91  
L1_ETM70 L1_ETM70 59  
L1_Mu14er_ETM30 L1_Mu14er_ETM30 74  
MissingEt algorithm triggers: 7 bits defined

SingleMuon algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_Mu8_HTT50 L1_Mu8_HTT50 54  
L1_SingleMuOpen L1_SingleMuOpen 48  
L1_Mu12_EG10 L1_Mu12_EG10 10  
L1_SingleMu16 L1_SingleMu16 49  
L1_SingleMuBeamHalo L1_SingleMuBeamHalo 104  
L1_SingleMu7 L1_SingleMu7 4  
L1_SingleMu5 L1_SingleMu5 50  
L1_Mu0er_ETM40 L1_Mu0er_ETM40 84  
L1_Mu4_EG18 L1_Mu4_EG18 78  
L1_Mu0er_ETM55 L1_Mu0er_ETM55 91  
L1_Mu16er_TauJet20er L1_Mu16er_TauJet20er 13  
L1_Mu6_HTT100 L1_Mu6_HTT100 77  
L1_SingleMu20er L1_SingleMu20er 51  
L1_Mu14er_ETM30 L1_Mu14er_ETM30 74  
L1_Mu10er_ETM50 L1_Mu10er_ETM50 73  
L1_Mu20_EG10 L1_Mu20_EG10 65  
L1_SingleMu25 L1_SingleMu25 55  
L1_SingleMu30 L1_SingleMu30 56  
SingleMuon algorithm triggers: 18 bits defined

SingleTau algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_QuadJetC36_TauJet52 L1_QuadJetC36_TauJet52 83  
L1_Mu16er_TauJet20er L1_Mu16er_TauJet20er 13  
L1_Mu16er_IsoTau32er L1_Mu16er_IsoTau32er 24  
L1_Mu16er_IsoTau28er L1_Mu16er_IsoTau28er 85  
SingleTau algorithm triggers: 4 bits defined

QuadMuon algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_QuadMu0 L1_QuadMu0 102  
QuadMuon algorithm triggers: 1 bits defined

TripleEgamma algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_TripleEG_14_10_8 L1_TripleEG_14_10_8 88  
TripleEgamma algorithm triggers: 1 bits defined

TotalHt algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_HTT200 L1_HTT200 64  
L1_Mu8_HTT50 L1_Mu8_HTT50 54  
L1_HTT125 L1_HTT125 61  
L1_DoubleEG6_HTT150 L1_DoubleEG6_HTT150 82  
L1_EG25er_HTT100 L1_EG25er_HTT100 26  
L1_HTT175 L1_HTT175 63  
L1_HTT250 L1_HTT250 71  
L1_HTT75 L1_HTT75 9  
TotalHt algorithm triggers: 8 bits defined

TripleMuon algorithm triggers

Trigger Name Trigger Alias Bit Comments
L1_TripleMu_5_5_3 L1_TripleMu_5_5_3 87  
L1_TripleMu0 L1_TripleMu0 86  
TripleMuon algorithm triggers: 2 bits defined

 

List of algorithm triggers sorted by bits

Algorithm Alias Bit number
L1_ZeroBias L1_ZeroBias 1
L1_AlwaysTrue L1_AlwaysTrue 2
L1_SingleEG2_BptxAND L1_SingleEG2_BptxAND 3
L1_SingleMu7 L1_SingleMu7 4
L1_SingleEG15 L1_SingleEG15 5
L1_ETT15_BptxAND L1_ETT15_BptxAND 6
L1_ETT40 L1_ETT40 7
L1_ETT60 L1_ETT60 8
L1_HTT75 L1_HTT75 9
L1_Mu12_EG10 L1_Mu12_EG10 10
L1_Mu5_EG15 L1_Mu5_EG15 11
L1_DoubleTauJet40er L1_DoubleTauJet40er 12
L1_Mu16er_TauJet20er L1_Mu16er_TauJet20er 13
L1_HTT100 L1_HTT100 14
L1_SingleIsoEG20 L1_SingleIsoEG20 15
L1_SingleJet52 L1_SingleJet52 16
L1_SingleJet68 L1_SingleJet68 17
L1_SingleS1Jet92 L1_SingleS1Jet92 18
L1_SingleJet128 L1_SingleJet128 19
L1_SingleS1Jet176 L1_SingleS1Jet176 20
L1_SingleS1Jet200 L1_SingleS1Jet200 21
L1_SingleS1Jet36 L1_SingleS1Jet36 22
L1_DoubleIsoTau32er L1_DoubleIsoTau32er 23
L1_Mu16er_IsoTau32er L1_Mu16er_IsoTau32er 24
L1_DoubleMu0 L1_DoubleMu0 25
L1_EG25er_HTT100 L1_EG25er_HTT100 26
L1_DoubleMuOpen L1_DoubleMuOpen 27
L1_SingleIsoEG25er L1_SingleIsoEG25er 28
L1_SingleIsoEG25 L1_SingleIsoEG25 29
L1_SingleIsoEG30er L1_SingleIsoEG30er 30
L1_SingleEG10 L1_SingleEG10 31
L1_SingleIsoEG22er L1_SingleIsoEG22er 32
L1_DoubleJetC52 L1_DoubleJetC52 33
L1_DoubleJetC84 L1_DoubleJetC84 34
L1_SingleMu14_Eta2p1 L1_SingleMu14_Eta2p1 35
L1_DoubleS1JetC112 L1_DoubleS1JetC112 36
L1_DoubleMu_10_Open L1_DoubleMu_10_Open 37
L1_DoubleMu_10_3p5 L1_DoubleMu_10_3p5 38
L1_QuadJetC40 L1_QuadJetC40 39
L1_SingleEG5 L1_SingleEG5 40
L1_SingleEG25 L1_SingleEG25 41
L1_SingleEG40 L1_SingleEG40 42
L1_SingleIsoEG18er L1_SingleIsoEG18er 43
L1_SingleIsoEG20er L1_SingleIsoEG20er 44
L1_SingleEG20 L1_SingleEG20 45
L1_SingleEG30 L1_SingleEG30 46
L1_SingleEG35 L1_SingleEG35 47
L1_SingleMuOpen L1_SingleMuOpen 48
L1_SingleMu16 L1_SingleMu16 49
L1_SingleMu5 L1_SingleMu5 50
L1_SingleMu20er L1_SingleMu20er 51
L1_SingleMu12 L1_SingleMu12 52
L1_SingleMu20 L1_SingleMu20 53
L1_Mu8_HTT50 L1_Mu8_HTT50 54
L1_SingleMu25 L1_SingleMu25 55
L1_SingleMu30 L1_SingleMu30 56
L1_ETM30 L1_ETM30 57
L1_ETM50 L1_ETM50 58
L1_ETM70 L1_ETM70 59
L1_ETM100 L1_ETM100 60
L1_HTT125 L1_HTT125 61
L1_HTT150 L1_HTT150 62
L1_HTT175 L1_HTT175 63
L1_HTT200 L1_HTT200 64
L1_Mu20_EG10 L1_Mu20_EG10 65
L1_Mu5_EG20 L1_Mu5_EG20 66
L1_Mu5_IsoEG18 L1_Mu5_IsoEG18 67
L1_Mu6_DoubleEG10 L1_Mu6_DoubleEG10 68
L1_SingleJetC32_NotBptxOR_BxOffset0And1 L1_SingleJetC32_NotBptxOR_BxOffset0And1 69
L1_ETM40 L1_ETM40 70
L1_HTT250 L1_HTT250 71
L1_Mu10er_ETM30 L1_Mu10er_ETM30 72
L1_Mu10er_ETM50 L1_Mu10er_ETM50 73
L1_Mu14er_ETM30 L1_Mu14er_ETM30 74
L1_DoubleMu7_EG7 L1_DoubleMu7_EG7 75
L1_SingleMu16_Eta2p1 L1_SingleMu16_Eta2p1 76
L1_Mu6_HTT100 L1_Mu6_HTT100 77
L1_Mu4_EG18 L1_Mu4_EG18 78
L1_SingleMuOpen_NotBptxOR L1_SingleMuOpen_NotBptxOR 79
L1_DoubleMu6_EG6 L1_DoubleMu6_EG6 80
L1_Mu5_DoubleEG5 L1_Mu5_DoubleEG5 81
L1_DoubleEG6_HTT150 L1_DoubleEG6_HTT150 82
L1_QuadJetC36_TauJet52 L1_QuadJetC36_TauJet52 83
L1_Mu0er_ETM40 L1_Mu0er_ETM40 84
L1_Mu16er_IsoTau28er L1_Mu16er_IsoTau28er 85
L1_TripleMu0 L1_TripleMu0 86
L1_TripleMu_5_5_3 L1_TripleMu_5_5_3 87
L1_TripleEG_14_10_8 L1_TripleEG_14_10_8 88
L1_DoubleEG_15_10 L1_DoubleEG_15_10 89
L1_DoubleEG_22_10 L1_DoubleEG_22_10 90
L1_Mu0er_ETM55 L1_Mu0er_ETM55 91
L1_ETM60 L1_ETM60 92
L1_DoubleJetC100 L1_DoubleJetC100 93
L1_QuadJetC60 L1_QuadJetC60 94
L1_SingleJetC20_NotBptxOR_BxOffset0And1 L1_SingleJetC20_NotBptxOR_BxOffset0And1 95
L1_DoubleJetC56_ETM60 L1_DoubleJetC56_ETM60 96
L1_DoubleIsoTau28er L1_DoubleIsoTau28er 97
L1_DoubleIsoTau36er L1_DoubleIsoTau36er 98
L1_DoubleIsoTau40er L1_DoubleIsoTau40er 99
L1_TripleJet_92_76_64_VBF L1_TripleJet_92_76_64_VBF 100
L1_TripleJet_84_68_48_VBF L1_TripleJet_84_68_48_VBF 101
L1_QuadMu0 L1_QuadMu0 102
L1_DoubleMu_12_5 L1_DoubleMu_12_5 103
L1_SingleMuBeamHalo L1_SingleMuBeamHalo 104

 

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Topic revision: r1 - 2016-02-09 - NavidKhandanRad
 
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