Trigger and Clock Distribution System (TCDS)

Table of Contents



  • No TCDS system foreseen for prototyping and production stages
  • we need something for test beams probably and eventually for larger lab setups (trigger/clock in synch to multiple uDTCs)
  • it would be beneficial to record the timestamp and clock phase of all triggers for the analysis
  • (secondary) the availability/support of AMC13 cards might be limited
  • we are interested in all BGo commands (not only trigger)

Hence, the proposal to implement a TTC controller card on FC7, compatible that would distribute the trigger to one or more µTCA crates using the AMC13 (or another card) as a proxy.
The easiest way for the moments seems to be to send clock/trigger from an FC7 to the AMC13, so the plan is:

  • implement a dummy/clock trigger generator in an FC7, connected to the VHDL core that sends out TTC encoded on an optical fiber. Connect the FC7 output to the AC13 input and check that clock and trigger received correctly.
  • implement the access of clock and/or trigger from the front panel via a DIO5.

Then, if this works and not necessarily in this order:

  • implement an 'orbit' structure an allow for configurable BGo commands at arbitrary phase in the orbit and arbitrary pre-scaling.
  • implement trigger rules (a set of rules that go no like more than X triggers in Y consecutive BXs).
  • timestamp and measure the phase of each incoming trigger (w.r.t. the 40MHz clock). These info should be placed in a readout bufferand readout via IPbus like it was in uDTCFC7s.
  • investigate the option of using an alternative to the AMC13 to deliver clock/trigger/BGo to the backplane (maybe these?[1]).
  • design an analoge FMC card to directly receive signals from the photomultipliers, and have threshold programmable from the FPGA.

[1] Possible commercial alternative to AMC13:

1. Documentation

1.1 DAQ development for IT and OT Meeting slides

  • 20180614_IT-uDTC_developers_meeting pdf
  • 20180619_IT-uDTC_developers_meeting pdf
  • 20180629_DAQ_development_for_IT_test_systems pdf
  • 20180713_DAQ_development_for_IT_test_systems pdf
  • 20180727_DAQ_development_for_IT_test_systems pdf
  • 20180824_DAQ_development_for_IT_test_systems pdf
  • 20180907_DAQ_development_for_IT_test_systems pdf
  • 20180914_DAQ_development_for_IT_test_systems pdf
  • 20180921_DAQ_development_for_IT_test_systems pdf
  • 20180928_DAQ_development_for_IT_test_systems pdf
  • 20181005_DAQ_development_for_IT_test_systems pdf
  • 20181012_DAQ_development_for_IT_test_systems pdf
  • 20181019_DAQ_development_for_IT_test_systems pdf
  • 20181102_DAQ_development_for_IT_test_systems pdf
  • 20181130_DAQ_development_for_IT_test_systems pdf
  • 20190128_DAQ_development_for_IT_test_systems pdf
  • 20190211_DAQ_development_for_IT_test_systems pdf
  • 20190215_DAQ_development_for_IT_test_systems pdf
  • 20190311_DAQ_development_for_IT_test_systems pdf
  • 20190325_DAQ_development_for_IT_test_systems pdf
  • 20190506_DAQ_development_for_IT_test_systems pdf
  • 20190527_Discussion_on_a_dedicated_FC7-based_TTC_board pdf
  • 20190603_Dedicated_FC7_based_TTC_card pdf
  • 20190617_Dedicated_FC7_based_TTC_card pdf
  • 20190701_Dedicated_FC7_based_TTC_card pdf
  • 20190826_DAQ_development_for_IT_and_OT pdf
  • 20191021_DAQ_development_for_IT_and_OT pdf

1.2 Manuals, repositories and links

2. uTCA Test Setup

20191016 192611.jpg
Figure 1. uTCA test setup

Firmware blocks and hardware routing that is particularly important to us right now are shown in Figure 2.

AMC13 uTCA FC7.png
Figure 2. AMC13 -uTCA - FC7 route diagram

Clocking diagram of FC7 is shown in Figure 3. The default clock source is driven by the 40.08 MHz local PLL and its route is marked with blue color.

CLOCK IT-firmware.png
Figure 3. FC7 clocking diagram

2.1 Installing software packages

2.1.1 Install CentOS 7.3 on PC

CentOS vault→
Download the Minimal install image →
Verify the iso image →
Run dd command and write it to a USB stick →

Minimal install without smart card support

→ First login

$ sudo yum install epel-release
$ sudo yum groupinstall "X Window System"
$ sudo yum groupinstall xfce
$ sudo yum install xfce4-* nano firefox wget git
$ sudo systemctl set-default
$ sudo systemctl isolate
$ reboot

Choose XFCE session on startup...

2.1.2 Install and start rarpd service

$ sudo yum install meson libcap libcap-devel openssl openssl-devel docbook*
$ git clone
$ cd iputils
$ sed -e '/BUILD_RARPD/ s/value *: *false/value : true/g' -i meson_options.txt
$ meson builddir
$ cd builddir
$ ninja-build || ninja
$ sudo cp rarpd /sbin/rarpd
$ sudo nano /etc/systemd/system/rarpd.service

Description=Reverse Address Resolution Protocol Requests Server

ExecStart =/usr/sbin/rarpd -a -e -v


$ sudo systemctl daemon-reload
$ sudo systemctl restart rarpd.service
$ sudo systemctl status rarpd.service

2.1.3 Configure network for uTCA crate

  • If there is only one ethernet connector, use a USB/Ethernet adapter for the internet.
  • The easiest way to configure the networking is using the GUI: Desktop → Applications → Settings → Network connections
  • Alternatively network-scripts can be used:

$ ip a → choose a network interface
$ cd /etc/sysconfig/network-scripts/ → your configuration should be similar to this one...

ONBOOT=yes → Do not forget to set this!
PREFIX=16 → to expand subnet range

$ sudo systemctl restart network.service
$ sudo systemctl status network.service

2.1.4 Add FC7s to rarpd

  • MCH, AMC13 T1 and T2 do not need to be added to rarpd, they know their own IP addresses!

$ sudo yum install wireshark tshark telnet → For controlling the uTCA crate you should download NATview as well.
$ sudo tshark -i <eth interface> → Put the first FC7 to one AMC slot in the uTCA crate, push on the Hot-plug switch and add it to rarpd. You can install multiple FC7s in the same way.
$ sudo nano /etc/ethers

08:00:30:00:23:59 FC7_1
08:00:30:00:29:01 FC7_2

$ sudo nano /etc/hosts localhost localhost.localdomain localhost4 localhost4.localdomain4
::1 localhost localhost.localdomain localhost6 localhost6.localdomain6 FC7_1 FC7_2

$ sudo systemctl restart rarpd.service
$ ping FC7_1
$ ping FC7_2

2.1.5 Preparing microSD card for FC7

The easiest way to put the GoldenImage.bin to the microSD card is to use the dd command as Sarah recommended in the 3rd DAQ School.

You can find the GoldenImage.bin in the link below compressed in imgtool.

$ sudo fdisk -l → find SD card reader
$ sudo dd if=sdgoldenimage.img of=/dev/sd_card_name bs=512

→ Alternatively you can use imgtool!

Download and source avr32 toolchain for linux →

$ wget
$ wget

$ tar -xvzf avr32-gnu-toolchain-
$ unzip

$ mv avr32-gnu-toolchain-linux_x86/* ~/avr32-tools
$ mv avr-headers/avr32 ~/avr32-tools/avr32/include

$ export PATH=$PATH:$HOME/avr32-tools/bin
$ avr32-gcc --version
avr32-gcc (AVR_32_bit_GNU_Toolchain_3.4.3_820) 4.4.7
Copyright (C) 2010 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO

→ Download and compile imgtool → ic_mmc_v1_6_6.tar.gz

$ tar -xvzf ic_mmc_v1_6_6.tar.gz
$ cd ic_mmc_v1_6_6/imperial_mmc/
$ make Board=FC7_2
$ cd tools/imgtool/bin/
$ ./imgtool ?
Usage: imgtool image command [parameters]

Cmds: format <label> -- Formats an image
list -- List files in an image
add <name> <file> -- Adds a file to an image
get <name> <file> -- Gets a file from an image
del <name> -- Deletes a file from an image
check <name> -- Verifies the checksum of a file

→ Format and copy fallback image to microSD card.

$ sudo fdisk -l → find SD card reader
$ ./imgtool /dev/sdc list
$ ./imgtool /dev/sdc format fc7
$ ./imgtool /dev/sdc add GoldenImage.bin GoldenImage.bin
$ ./imgtool /dev/sdc check GoldenImage.bin

2.1.6 Install Ph2_ACF and upload bitstream to FC7

→ Install ipbus-software v2.5 from rpm repository or compile from source.

$ sudo nano /etc/yum.repos.d/ipbus-sw.repo

name=IPbus software repository

name=IPbus software repository updates

$ sudo yum clean all
$ sudo yum groupinstall uhal

→ Install ipbus-software v2.5.0 from source:

$ sudo yum -y install make rpm-build git-core erlang gcc-c++ boost-devel pugixml-devel python-devel
$ git clone --depth=1 -b v2.5.0
$ cd ipbus-software
$ make Set=uhal
$ make Set=uhal rpm
$ sudo yum localinstall `find . -iname "*.rpm"`

→ Install root:

$ sudo yum install root
$ sudo yum install root-net-http root-graf3d-gl root-physics root-montecarlo-eg root-graf3d-eve root-geom libusb-devel xorg-x11-xauth.x86_64

→ Now you can compile and install Ph2_ACF from source.

$ sudo yum install cmake boost-devel
$ git clone -b master
$ cd Ph2_ACF
$ source
$ cd build
$ cmake ..
$ make -j4
$ cd ..
$ nano settings/D19CDescription.xml → set IP address of FC7
$ fpgaconfig -l -c settings/D19CDescription.xml
$ fpgaconfig -f ../bitstream/IT-firmware_dev.bit -i IT-firmware_dev.bit -c settings/D19CDescription.xml
$ fpgaconfig -i IT-firmware_dev.bit -c settings/D19CDescription.xml

2.1.7 Install Inner Tracker Ph2_ACF and upload bitstream to FC7

  • Prerequisites for Inner Tracker Ph2_ACF are the same as in 2.1.8.

→ Compile and install Inner Tracker Ph2_ACF from source.

$ sudo yum install cmake boost-devel
$ git clone -b chipPolymorphism
$ cd Ph2_ACF
$ source
$ mkdir myBuild
$ cd myBuild
$ cmake ..
$ make -j4
$ cd ..
$ mkdir test/
$ cp settings/RD53Files/CMSIT_RD53.txt test/
$ cp settings/CMSIT.xml test/
$ cd test/
$ nano CMSIT.xml → set IP address of FC7
$ fpgaconfig -l -c CMSIT.xml
$ fpgaconfig -f ../bitstream/IT-firmware_dev.bit -i IT-firmware_dev.bit -c CMSIT.xml
$ fpgaconfig -i IT-firmware_dev.bit -c CMSIT.xml

2.1.8 Install AMC13 tools and run test scripts

$ wget T1 firmware version 0x2264 and T2 firmware version 0x32
$ wget
$ sudo yum localinstall ipmitool-1.8.11-13.el6.1.x86_64.rpm
$ service ipmi start
$ sudo yum install boost-devel readline readline-devel
$ tar -xvzf amc13-1.2.9.tar.gz
$ cd amc13-1.2.9/
$ source
$ make → You have to install cactus before you make this! Be aware, that you have to install the packeges listed before source compilation as well.

→ Looking for IP addresses of AMC13

$ cd dev_tools/amc13Config/
$ nano

#File to specify what the default varaibles addresses are used in your system

#Default IP address for commercial MCH module
# our NAT MCH address
DEFAULT_HOST_IP="" <---- set to uTCA crate IP address
# our Vadatech MCH address

#Default AMC13 slot number

#Location of 'config_tools'. This should never need to be changed

#Network base for your uTCA crate's AMC modules
NETWORK_BASE="192.168.1" <---- set to uTCA crate subnet

$ ./ OR
$ ./ --host= --slot=13 → T1, T2

→ Read MMC version

$ ./ --host= --slot=13 → 02 02

→ Create connections.xml file

$ cd ../../amc13/etc/amc13
$ cp connectionSN43.xml connections.xml
$ nano connections.xml

<?xml version="1.0" encoding="UTF-8"?>

<connection id="T1" uri="ipbusudp-2.0://" address_table="file://AMC13XG_T1.xml" />
<connection id="T2" uri="ipbusudp-2.0://" address_table="file://AMC13XG_T2.xml" />

→ Print AMC13 firmware versions

$ cd ../../../dev_tools/python/
$ ./ ../../amc13/etc/amc13/connections.xml
Using AMC13 software ver:0
Read firmware versions 0x2264 0x32
flavor = 2 features = 0x000000b2
T1 firmware version 0x2264
T2 firmware version 0x32

2.1.9 Install Vivado Lab Tools 2017.4

Register and download Vivado Lab Tools 2017.4 for linux →

$ tar -xvzf Xilinx_Vivado_Lab_Lin_2017.4_1216_1.tar.gz
$ cd Xilinx_Vivado_Lab_Lin_2017.4_1216_1/
$ sudo mkdir /opt/Xilinx
$ sudo chown -R <user-name>:<user-name> /opt/Xilinx
$ sudo chmod u+rwX /opt/Xilinx
$ ./xsetup

→ Install cable drivers

$ cd /opt/Xilinx/Vivado_Lab/2017.4/data/xicom/cable_drivers/lin64/install_script/install_drivers
$ sudo ./install_drivers

→ Run Vivado Lab Tools

$ source /opt/Xilinx/Vivado_Lab/2017.4/
$ vivado_lab &

→ Finally, you should pull out the JTAG from USB and plug it back.

2.2 Hardware debugging

Hardware debugging started with d19c-firmware from 5601fa13 commit →

$ git clone
$ cd d19c-firmware
$ git checkout 5601fa132ed8e89326b9c5ff13c8a3adc3cb73c2

2.2.1 First TTC input signal measurement with scope

  • To avoid multiple driver problem, the incoming TTC differential signal sent by AMC13 T2 to FC7 is buffered to single ended and routed to fmc_l12_spare pin.
  • Measurement of the single ended TTC signal is shown in Figure 4-5.

TTC input scope.jpg
Figure 4. TTC input signal in FC7 scope diagram
TTC input scope conf.jpg
Figure 5. TTC input signal in FC7 scope configuration

2.2.2 TTC input signal and fabric clock measurement with scope

  • Default clock source switched to AMC13 in FC7 firmware.
  • Fabric clock is the clock sent by AMC13 through the backplane.
  • There is 90 degrees phase shift between the TTC input signal and AMC13 clock source. TTC input signal is ahead of the AMC13 clock.

TTC input clock desktop.jpg
Figure 6. TTC input signal and fabric clock in FC7 desktop
TTC input clock scope.jpg
Figure 7. TTC input signal and fabric clock in FC7 scope diagram
TTC input clock probes.jpg
Figure 8. TTC input signal and fabric clock in FC7 probes

  • FC7 fmc l12 spare pinout

ttc_input 6 7 GND
general_reset 4 5 ttc_enable
ref_clk_200MHz 2 3 ipb_clk
fabric_clk 0 1 clk_40_0
+2.5V GND

2.2.3 Measurement of channel_a and channel_b in TTC decoder block

  • Channel a and b signals in TTC decoder routed to fmc_l12_spare pins.

TTC channel a b desktop.jpg
Figure 9. TTC channel a and b in TTC decoder desktop
TTC channel a b scope.jpg
Figure 11. TTC channel a and b in TTC decoder scope
TTC channel a b probes.jpg
Figure 12. TTC channel a and b in TTC decoder probes

  • FC7 fmc l12 spare pinout

channel_b 6 7 GND
general_reset 4 5 channel_a
ref_clk_200MHz 2 3 ipb_clk
fabric_clk 0 1 clk_40_0
+2.5V GND

2.2.4 Debugging TTC decoder with JTAG cable

  • Internal signals of the TTC decoder block in FC7 were probed by ILA cores and debugged by JTAG cable in VIvado Lab Tools
  • Output signals of the IDDR are ttc_q1 and ttc_q2 respectively.
  • After the 11th clock rising edge TTC decoder decides which is channel a and b from ttc_q1 and ttc_q2.
  • Channel a goes through a synchronizer to fit into the BX clock domain and gets into the output if the 10000th clock rising edge meets the synchronization criterion.
  • Channel b is Hamming decoded. ec0, bc0 and reset signals get into the output.

JTAG ttc q1 ttc q2.png
Figure 13. TTC decoder ttc_q1 and ttc_q2
JTAG channel a channel b.png
Figure 14. TTC decoder channel_a and channel_b
JTAG l1a pulse ttc rdy.png
Figure 15. TTC decoder ttc_rdy and l1a_pulse
JTAG bc0 ec0 l1a reset.png
Figure 16. TTC decoder ec0, bc0, l1a and reset

  • Figure 17. shows decoded IDDR output signals according to the measured TTC input signal shown in Figured 7.

Decoded IDDR signal.png
Figure 17. Decoded IDDR output signals

2.2.5 Testing event counter in be_proc

  • First, I bypassed the fast command block, so that the l1a trigger pulse is received directly by the event counter in be_proc.
  • Then, I cut the ec0, bc0 and reset signals from be_proc input in order to avoid resetting the counters, while I am reading out event counter values with python script.
  • Test results showed that the event counter did not count.

2.2.6 Testing event counter in be_proc with ec0

  • ec0 reset was routed to l1a trigger input of be_proc for testing the functionality of event counter.
  • After running the python script, the event counter worked!
  • This behaviour is understandable from previous measurement results.
  • AMC13 only sent bc0 and ec0 resets to FC7.
  • But why it does not send l1a trigger??

2.2.7 Sending L1A triggers to FC7

  • In order to detect incoming l1a triggers in FC7 sent by AMC13 the following initialization procedure was used

Step 1 → Reset AMC13, enable clock distribution and continous trigger through the backplane to the 7th AMC slot in uTCA crate

$ cd amc13-1.2.9/tools/bin/
$ source ../../
$ AMC13Tool2.exe -c ../../amc13/etc/amc13/connections.xml
No address table path specified.
Using .xml connection file...
Using AMC13 software ver:0
Read firmware versions 0x2264 0x32
flavor = 2 features = 0x000000b2
>rg → general reset
>rc → counter reset
>en 7 f t → enable loopback mode, TTC clock distribution, fake data and trigger to the 7th AMC slot
>lt c → enable continous trigger mode
>st → status

Step 2 → upload firmware to FC7

$ cd Ph2_ACF/
$ source
$ fpgaconfig -f test/20191111_tbalazs_0056.bit -i 20191111_tbalazs_0056.bit -c settings/D19CDescription.xml → set FC7s IP address here
$ cd test/
$ fpgaconfig -i 20191111_tbalazs_0056.bit -c CMSIT.xml
Time to Initialize/configure the system: finished at: Thu Nov 14 13:27:24 2019
elapsed time: 6.71e-07 seconds

Step 3 → Run python script to configure d19c-firmware

$ cd d19c-firmware/sw/fc7/
$ source
- PATH += /opt/cactus/bin
- PYTHONPATH += /home/veszpv/d19c-firmware/sw/pychips/src
- LD_LIBRARY_PATH += /home/veszpv/d19c-firmware/sw/fc7/tests/lib
- LD_LIBRARY_PATH += /home/veszpv/d19c-firmware/sw/fc7/fc7/lib
- LD_LIBRARY_PATH += /opt/cactus/lib
$ cd ..
$ cd d19cScripts/
$ nano ipaddr.dat → set FC7's IP address
$ python
clock source switched to AMC13 ...
Selected clock source 0

general reset sent to d19c-firmware ...

reset sent to ttc decoder block ...

# library calls
import sys
from PyChipsUser import *
from time import sleep
from fc7_lib import *

# define fc7 object
fc7AddrTable = AddressTable ("./fc7AddrTable.dat")
f = open('./ipaddr.dat', 'r')
ipaddr = f.readline()
fc7 = ChipsBusUdp (fc7AddrTable, ipaddr, 50001)

# ------------------------------------------------------------------------ #
# clock_source: 0 - AMC13, 2 - backplane, 3 - internal oscillator(default) #
# ------------------------------------------------------------------------ #
fc7.write("clock_source", 0)
print "clock source switched to AMC13 ..."
print "Selected clock source","clock_source")

fc7.write("ctrl_command_global_reset", 1)
fc7.write("ctrl_command_global_reset", 0)
print ""
print "general reset sent to d19c-firmware ..."
print ""

fc7.write("ttc_dec_reset", 1)
fc7.write("ttc_dec_reset", 0)
print "reset sent to ttc decoder block ..."

Step 4 → Run Vivado Lab Tools to scope the incoming signals

$ source /opt/Xilinx/Vivado_Lab/2017.4/
$ vivado_lab &
Open Hardware Manager
Open TargetAuto Connect
Open debug_nets.ltx

bcf ec0 bc0 l1a.png
Figure 18. Broadcast frame - ILA core
bcf ec0 bc0 large.png
Figure 19. Broadcast frame - ec0 & bc0
bcf l1a large.png
Figure 20. Broadcast frame - l1a

-- TamasBalazs - 2019-10-26 Contact

Institute for Particle and Nuclear Physics --------------------------
Wigner Research Centre for Physics
Hungarian Academy of Sciences
Address: -
Konkoly Thege Miklos street 29-33. H-1121 Budapest
Letters: H-1525 Budapest, P.O.Box 49, Hungary
Phone: (+36-1) 392-2222 ext. 3486
Fax:_ (+36-1) 392-2598
Topic attachments
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PDFpdf 20180614_IT-uDTC_developers_meeting.pdf r1 manage 1031.0 K 2019-10-26 - 16:27 TamasBalazs  
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PDFpdf T3-201105012.PDF r1 manage 228.9 K 2019-10-28 - 17:29 TamasBalazs  
JPEGjpg TTC_channel_a_b_desktop.jpg r1 manage 1258.5 K 2019-11-06 - 16:42 TamasBalazs  
JPEGjpg TTC_channel_a_b_probes.jpg r1 manage 593.7 K 2019-11-06 - 16:42 TamasBalazs  
JPEGjpg TTC_channel_a_b_scope.jpg r1 manage 4802.8 K 2019-11-06 - 16:50 TamasBalazs  
JPEGjpg TTC_input_clock_desktop.jpg r1 manage 1511.3 K 2019-11-06 - 15:18 TamasBalazs  
JPEGjpg TTC_input_clock_probes.jpg r1 manage 4346.7 K 2019-11-06 - 15:18 TamasBalazs  
JPEGjpg TTC_input_clock_scope.jpg r1 manage 4502.7 K 2019-11-06 - 15:18 TamasBalazs  
JPEGjpg TTC_input_scope.jpg r1 manage 3969.2 K 2019-11-06 - 15:08 TamasBalazs  
JPEGjpg TTC_input_scope_conf.jpg r1 manage 4678.4 K 2019-11-06 - 15:08 TamasBalazs  
PNGpng bcf_ec0_bc0_l1a.png r1 manage 55.1 K 2019-11-14 - 14:23 TamasBalazs  
PNGpng bcf_ec0_bc0_large.png r1 manage 35.3 K 2019-11-14 - 14:23 TamasBalazs  
PNGpng bcf_l1a_large.png r1 manage 34.7 K 2019-11-14 - 14:23 TamasBalazs  
Unknown file formatgz ic_mmc_v1_6_6.tar.gz r1 manage 7276.0 K 2019-10-29 - 15:18 TamasBalazs  
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Topic revision: r23 - 2019-11-15 - TamasBalazs
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